公开(公告)号：US20210260525A1

公开(公告)日：2021-08-26

申请号：US17256577

申请日：2018-06-29

申请人： Gang HE ,  Lori WASHINGTON ,  Liqiang YAO ,  Jianhui NAN ,  Xinyun ZHANG ,  UTICA LEASECO, LLC ,  DONGTAI HI-TECH EQUIPMENT TECHNOLOGY CO., LTD.

发明人： Gang HE ,  Lori WASHINGTON ,  Liqiang YAO ,  Jianhui NAN ,  Xinyun ZHANG

IPC分类号： B01D53/75 ,  B01D53/00 ,  B01D53/24 ,  C23C16/44 ,  B01D53/64 ,  B01D8/00

摘要： The disclosure describes various aspects of a metal organic chemical vapor deposition (MOCVD) effluent abatement process. In an aspect, a system for removing toxic waste from an exhaust stream includes a first cold trap that operates at a first pressure and condenses toxic materials in the exhaust stream for removal as solid waste; a pump connected to the first cold trap that increases a pressure of the exhaust stream; a hot cracker connected to the pump that decomposes toxic materials remaining in the exhaust stream after the first cold trap; a second cold trap connected to the hot cracker that operates at a second pressure higher than the first pressure and condenses the decomposed toxic materials remaining in the exhaust stream for removal as solid waste; and a scrubber connected to the second cold trap that absorbs toxic materials remaining in the exhaust stream after the second cold trap.

公开(公告)号：US08105908B2

公开(公告)日：2012-01-31

申请号：US11165282

申请日：2005-06-23

申请人： Sunderraj Thirupapuliyur ,  Faran Nouri ,  Lori Washington

发明人： Sunderraj Thirupapuliyur ,  Faran Nouri ,  Lori Washington

IPC分类号： H01L21/336

CPC分类号： H01L29/7843 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66628 ,  H01L29/7848

摘要： Methods are provided for manufacturing transistors and altering the stress in the channel region of a single transistor. One or more parameters that are effect stress in the channel region are altered for a single transistor to increase or decrease the channel stress in PMOS and NMOS transistors.

摘要翻译： 提供了用于制造晶体管并改变单个晶体管的沟道区域中的应力的方法。 对于单个晶体管，在沟道区域中影响应力的一个或多个参数被改变以增加或减小PMOS和NMOS晶体管中的沟道应力。

公开(公告)号：US07575982B2

公开(公告)日：2009-08-18

申请号：US11404525

申请日：2006-04-14

申请人： David Bour ,  Sandeep Nijhawan ,  Lori Washington ,  Jacob Smith ,  David Eaglesham

发明人： David Bour ,  Sandeep Nijhawan ,  Lori Washington ,  Jacob Smith ,  David Eaglesham

IPC分类号： H01L21/30

CPC分类号： C23C16/481 ,  C23C16/303 ,  C23C16/45502 ,  C23C16/4583 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L33/007 ,  H01L33/0079

摘要： Methods are provided of fabricating compound nitride semiconductor structures. A group-III precursor and a nitrogen precursor are flowed into a processing chamber to deposit a first layer over a surface of a first substrate with a thermal chemical-vapor-deposition process. A second layer is deposited over a surface of a second substrate with the thermal chemical-vapor-deposition process using the first group-III precursor and the first nitrogen precursor. The first and second substrates are different outer substrates of a plurality of stacked substrates disposed within the processing chamber as a stack so that the first and second layers are deposited on opposite sides of the stack. Deposition of the first layer and deposition of the second layer are performed simultaneously.

摘要翻译： 提供了制造复合氮化物半导体结构的方法。 将III族前体和氮前体流入处理室中，以通过热化学气相沉积工艺在第一基板的表面上沉积第一层。 使用第一组III前体和第一氮前体，通过热化学气相沉积工艺将第二层沉积在第二衬底的表面上。 第一和第二基板是作为堆叠设置在处理室内的多个堆叠基板的不同的外部基板，使得第一和第二层沉积在堆叠的相对侧上。 同时进行第一层的沉积和第二层的沉积。

公开(公告)号：US07470599B2

公开(公告)日：2008-12-30

申请号：US11404390

申请日：2006-04-14

申请人： Sandeep Nijhawan ,  David Eaglesham ,  Lori Washington ,  David Bour ,  Jacob Smith

发明人： Sandeep Nijhawan ,  David Eaglesham ,  Lori Washington ,  David Bour ,  Jacob Smith

IPC分类号： H01L21/30 ,  H01L21/46

CPC分类号： H01L33/007 ,  C30B25/02 ,  C30B29/403 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254

摘要： Methods are provided of fabricating a nitride semiconductor structure. A group-III precursor and a nitrogen precursor are flowed into a processing chamber to deposit a first layer over one side of the substrate with a thermal chemical-vapor-deposition process. A second layer is similarly deposited over an opposite side of the substrate using the group-III precursor and the nitrogen precursor. The substrate is cooled after depositing the first and second layers without substantially deforming a shape of the substrate.

摘要翻译： 提供了制造氮化物半导体结构的方法。 将III族前体和氮前体流入处理室中，以通过热化学气相沉积工艺在衬底的一侧沉积第一层。 类似地，使用III族前体和氮前体在衬底的相对侧上沉积第二层。 在沉积第一层和第二层之后冷却衬底，而基本上不使形状变形。

公开(公告)号：US20070259504A1

公开(公告)日：2007-11-08

申请号：US11429084

申请日：2006-05-05

申请人： David Bour ,  Sandeep Nijhawan ,  Jacob Smith ,  Lori Washington

发明人： David Bour ,  Sandeep Nijhawan ,  Jacob Smith ,  Lori Washington

IPC分类号： C30B13/00 ,  H01L21/331 ,  H01L21/20

CPC分类号： C30B25/02 ,  C30B29/403 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02639 ,  H01L29/2003 ,  H01L33/007 ,  H01L33/025

摘要： In accordance with the present invention, improved methods for reducing the dislocation density of nitride epitaxial films are provided. Specifically, an in-situ etch treatment is provided to preferentially etch the dislocations of the nitride epitaxial layer to prevent threading of the dislocations through the nitride epitaxial layer. Subsequent to etching of the dislocations, an epitaxial layer overgrowth is performed. In certain embodiments, the etching of the dislocations occurs simultaneously with growth of the epitaxial layer. In other embodiments, a dielectric mask is deposited within the etch pits formed at the dislocations prior to the epitaxial layer overgrowth.

摘要翻译： 根据本发明，提供了用于降低氮化物外延膜的位错密度的改进方法。 具体地，提供了原位蚀刻处理以优先蚀刻氮化物外延层的位错，以防止通过氮化物外延层的位错穿透。 在蚀刻位错之后，进行外延层过度生长。 在某些实施例中，位错的蚀刻与外延层的生长同时发生。 在其它实施例中，在外延层过度生长之前，在形成于位错处的蚀刻坑内沉积电介质掩模。

公开(公告)号：US20070254100A1

公开(公告)日：2007-11-01

申请号：US11411672

申请日：2006-04-26

申请人： Sandeep Nijhawan ,  Lori Washington ,  Jacob Smith ,  Gary Kwong ,  David Bour ,  David Eaglesham

发明人： Sandeep Nijhawan ,  Lori Washington ,  Jacob Smith ,  Gary Kwong ,  David Bour ,  David Eaglesham

IPC分类号： C23C16/00 ,  B05C11/00

CPC分类号： C23C16/303 ,  C23C16/4482 ,  C23C16/52

摘要： Methods and systems permit fabricating structures using liquid sources without active temperature control. A substrate is disposed within a substrate processing chamber. A liquid source of a group-III precursor is provided in a bubbler. A push gas is applied to the liquid source to drive the group-III precursor into a vaporizer. A carrier gas is flowed into the vaporizer. A flow of vaporized group-III precursor carried by the carrier gas is injected from the vaporizer into the processing chamber. A nitrogen precursor is flowed into the processing chamber. A group-III nitride layer is deposited over the substrate with a thermal chemical vapor deposition within the processing chamber using the vaporized group-III precursor and the nitrogen precursor.

摘要翻译： 方法和系统允许使用没有主动温度控制的液体源制造结构。 基板设置在基板处理室内。 在起泡器中提供III族前体的液体源。 推动气体被施加到液体源以驱动III族前体进入蒸发器。 载气流入蒸发器。 由载气携带的汽化的III族前体的流动从蒸发器注入到处理室中。 氮气前体流入处理室。 使用蒸发的III族前体和氮前体，在处理室内通过热化学气相沉积在衬底上沉积III族氮化物层。

公开(公告)号：US20070243652A1

公开(公告)日：2007-10-18

申请号：US11404525

申请日：2006-04-14

申请人： David Bour ,  Sandeep Nijhawan ,  Lori Washington ,  Jacob Smith ,  David Eaglesham

发明人： David Bour ,  Sandeep Nijhawan ,  Lori Washington ,  Jacob Smith ,  David Eaglesham

IPC分类号： H01L21/205 ,  H01L21/365

CPC分类号： C23C16/481 ,  C23C16/303 ,  C23C16/45502 ,  C23C16/4583 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L33/007 ,  H01L33/0079

摘要： Methods are provided of fabricating compound nitride semiconductor structures. A group-III precursor and a nitrogen precursor are flowed into a processing chamber to deposit a first layer over a surface of a first substrate with a thermal chemical-vapor-deposition process. A second layer is deposited over a surface of a second substrate with the thermal chemical-vapor-deposition process using the first group-III precursor and the first nitrogen precursor. The first and second substrates are different outer substrates of a plurality of stacked substrates disposed within the processing chamber as a stack so that the first and second layers are deposited on opposite sides of the stack. Deposition of the first layer and deposition of the second layer are performed simultaneously.

摘要翻译： 提供了制造复合氮化物半导体结构的方法。 将III族前体和氮前体流入处理室中，以通过热化学气相沉积工艺在第一基板的表面上沉积第一层。 使用第一组III前体和第一氮前体，通过热化学气相沉积工艺将第二层沉积在第二衬底的表面上。 第一和第二基板是作为堆叠设置在处理室内的多个堆叠基板的不同的外部基板，使得第一和第二层沉积在堆叠的相对侧上。 同时进行第一层的沉积和第二层的沉积。

公开(公告)号：US20050287752A1

公开(公告)日：2005-12-29

申请号：US11123588

申请日：2005-05-06

申请人： Faran Nouri ,  Lori Washington ,  Victor Moroz

发明人： Faran Nouri ,  Lori Washington ,  Victor Moroz

IPC分类号： H01L21/336 ,  H01L29/165

CPC分类号： H01L29/66636 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/7848

摘要： Methods are provided for depositing materials in forming semiconductor devices on a substrate, such as metal oxide transistors. In one embodiment, the invention generally provides a method of processing a substrate including forming a gate dielectric on a substrate having a first conductivity, forming a gate electrode on the gate dielectric, forming a first pair of sidewall spacers along laterally opposite sidewalls of the gate electrode, etching a pair of source/drain region definitions on opposite sides of the electrode, depositing a silicon-germanium material selectively in the source/drain region definitions, and implanting a dopant in the deposited silicon-germanium material to form a source/drain region having a second conductivity.

摘要翻译： 提供了用于在诸如金属氧化物晶体管的衬底上形成半导体器件中沉积材料的方法。 在一个实施例中，本发明通常提供一种处理衬底的方法，包括在具有第一导电性的衬底上形成栅极电介质，在栅极电介质上形成栅电极，在栅极的横向相对的侧壁上形成第一对侧壁间隔物 在电极的相对侧蚀刻一对源/漏区定义，在源/漏区定义中选择性地沉积硅 - 锗材料，以及在沉积的硅 - 锗材料中注入掺杂剂以形成源极/漏极 区域具有第二导电性。

公开(公告)号：US20110070721A1

公开(公告)日：2011-03-24

申请号：US12954133

申请日：2010-11-24

申请人： Sandeep NIJHAWAN ,  David Bour ,  Lori Washington ,  Jacob Smith ,  Ronald Stevens ,  David Eaglesham

发明人： Sandeep NIJHAWAN ,  David Bour ,  Lori Washington ,  Jacob Smith ,  Ronald Stevens ,  David Eaglesham

IPC分类号： H01L21/20

CPC分类号： C30B25/14 ,  C30B29/403 ,  C30B35/00 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/67155

摘要： Apparatus and methods are described for fabricating a compound nitride semiconductor structure. Group-III and nitrogen precursors are flowed into a first processing chamber to deposit a first layer over a substrate with a thermal chemical-vapor-deposition process. The substrate is transferred from the first processing chamber to a second processing chamber. Group-III and nitrogen precursors are flowed into the second processing chamber to deposit a second layer over the first layer with a thermal chemical-vapor-deposition process. The first and second group-III precursors have different group-III elements.

摘要翻译： 描述了用于制造复合氮化物半导体结构的装置和方法。 III族和氮气前体流入第一处理室，以通过热化学气相沉积工艺在衬底上沉积第一层。 衬底从第一处理室转移到第二处理室。 III族和氮气前体流入第二处理室以通过热化学气相沉积工艺在第一层上沉积第二层。 第一和第二组III前体具有不同的III族元素。

公开(公告)号：US07534714B2

公开(公告)日：2009-05-19

申请号：US11418634

申请日：2006-05-05

申请人： Lori Washington ,  Sandeep Nijhawan ,  David Carlson

发明人： Lori Washington ,  Sandeep Nijhawan ,  David Carlson

IPC分类号： H01L21/28 ,  H01L21/3205

CPC分类号： C30B25/12 ,  C30B25/02 ,  C30B25/10 ,  C30B29/403 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L33/007

摘要： Methods are disclosed of fabricating a compound nitride semiconductor structure. A substrate is disposed over a susceptor in a processing chamber, with the susceptor in thermal communication with the substrate. A group-III precursor and a nitrogen precursor are flowed into the processing chamber. The susceptor is heated with a nonuniform temperature profile to heat the substrate. A nitride layer is deposited over the heated substrate with a thermal chemical vapor deposition process within the processing chamber using the group-III precursor and the nitrogen precursor.

摘要翻译： 公开了制造复合氮化物半导体结构的方法。 基板设置在处理室中的基座上方，基座与基板热连通。 III族前体和氮前体流入处理室。 感受器以不均匀的温度分布被加热以加热基底。 使用III族前体和氮前体，在处理室内利用热化学气相沉积工艺在加热的衬底上沉积氮化物层。