公开(公告)号：US08258828B2

公开(公告)日：2012-09-04

申请号：US12938150

申请日：2010-11-02

Applicant: Jun Liu ,  Haibo Zhang

Inventor： Jun Liu ,  Haibo Zhang

IPC: H03K4/90

CPC classification number: H02M3/156

Abstract: An integrated circuit includes a saw-tooth generator including a saw tooth node configured to have a saw-tooth voltage generated thereon; and a first switch having a first end connected to the saw tooth node. The integrated circuit further includes a second switch coupled between an output node and an electrical ground, wherein the first switch and the second switch are configured to operate synchronously. A first current source is connected to the saw tooth node. A second current source is connected to the output node.

Abstract translation: 集成电路包括锯齿发生器，其包括被配置为具有在其上产生的锯齿电压的锯齿节点; 以及第一开关，其具有连接到锯齿节点的第一端。 集成电路还包括耦合在输出节点和电接地之间的第二开关，其中第一开关和第二开关被配置为同步地操作。 第一电流源连接到锯齿节点。 第二个电流源连接到输出节点。

公开(公告)号：US20110156821A1

公开(公告)日：2011-06-30

申请号：US12975125

申请日：2010-12-21

Applicant: Henry Ge

Inventor： Henry Ge

IPC: H03L9/00 ,  H03B19/00

CPC classification number: H03L7/00 ,  H03L1/00

Abstract: A circuit comprises a frequency divider configured to receive an oscillating signal generated by an oscillator and to divide the oscillating signal into a clock signal, wherein the division ratio of the frequency divider is set to a value equal to one of: the integer part of the resonant frequency of the oscillator and the integer part of the resonant frequency of the oscillator plus 1.

Abstract translation: 电路包括：分频器，被配置为接收由振荡器产生的振荡信号，并将振荡信号分频为时钟信号，其中分频器的分频比被设置为等于以下的值之一： 振荡器的谐振频率和振荡器的谐振频率的整数部分加1。

公开(公告)号：US20110089923A1

公开(公告)日：2011-04-21

申请号：US12902009

申请日：2010-10-11

Applicant: Zhenbiao Cai ,  Haibo Zhang

Inventor： Zhenbiao Cai ,  Haibo Zhang

IPC: G05F1/618

CPC classification number: H02M3/156 ,  G01R19/0092 ,  H02M2001/0009

Abstract: An integrated circuit includes a DC-DC converter, which includes an inductor; a first transistor coupled to the inductor and configured to pass an inductor current to the inductor; and a second transistor forming a current mirror with the first transistor. The integrated circuit further includes an operational amplifier. The operational amplifier includes a first input node and a second input node. The first input node is configured to couple to a drain of the first transistor when the first transistor is turned on, and decoupled from the drain of the first transistor when the first transistor is turned off. The second input node is coupled to a drain of the second transistor.

Abstract translation: 集成电路包括DC-DC转换器，其包括电感器; 耦合到所述电感器并被配置为将电感器电流传递到所述电感器的第一晶体管; 以及与第一晶体管形成电流镜的第二晶体管。 集成电路还包括运算放大器。 运算放大器包括第一输入节点和第二输入节点。 当第一晶体管导通时，第一输入节点被配置为耦合到第一晶体管的漏极，并且当第一晶体管截止时，第一输入节点与第一晶体管的漏极耦合。 第二输入节点耦合到第二晶体管的漏极。

公开(公告)号：US20110074511A1

公开(公告)日：2011-03-31

申请号：US12861678

申请日：2010-08-23

Applicant: Guo Hua Zhong ,  Mei Yang

Inventor： Guo Hua Zhong ,  Mei Yang

IPC: H03F3/16 ,  H01L29/78 ,  H05K7/20

CPC classification number: H01L21/4871 ,  H01L23/4824 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A power transistor for use in an audio application is laid out to minimize hot spots. Hot spots are created by non-uniform power dissipation or overly concentrated current densities. The source and drain pads are disposed relative to each other to facilitate uniform power dissipation. Interleaving metal fingers and upper metal layers are connected directly to lower metal layers in the absence of vias to improve current density distribution. This layout improves some fail detection tests by 17%.

Abstract translation: 布置用于音频应用的功率晶体管以最小化热点。 热点由不均匀的功耗或过度集中的电流密度产生。 源极和漏极焊盘相对于彼此设置以促进均匀的功率耗散。 在没有通孔的情况下，交叉金属指和上金属层直接连接到下金属层，以改善电流密度分布。 这种布局改进了17％的失败检测测试。

公开(公告)号：US12264976B2

公开(公告)日：2025-04-01

申请号：US17836817

申请日：2022-06-09

Applicant: STMicroelectronics (Shenzhen) R&D Co., Ltd. ,  STMicroelectronics (China) Investment Co., Ltd.

Inventor： Dino Costanzo ,  Yan Zhang ,  Guixi Sun

IPC: G01K7/01 ,  G01K3/00 ,  G01K7/16 ,  G01K7/18

Abstract: A three-phase load is powered by an SPWM driven inverter having a single shunt-topology. During operation, drain-to-source resistances of transistors of each branch of the inverter are determined. Interpolation is performed on assumed drain-to-source resistances of the transistors for different temperatures to produce a non-linear model of drain-to-source resistance to temperature for the transistors, and the drain-to-source resistances determined during operation and the non-linear model are used to estimate temperature values of the transistors. Driving of the inverter can be adjusted so that conductivity of each branch is set so that power delivered by that branch is as high as possible without exceeding an allowed drain current threshold representing a threshold junction temperature. In addition, driving of the inverter can be ceased if the temperature of a transistor exceeds the threshold temperature.

公开(公告)号：US20230356397A1

公开(公告)日：2023-11-09

申请号：US17661899

申请日：2022-05-03

Applicant: STMICROELECTRONICS LTD ,  STMicroelectronics (Shenzhen) R&D Co., Ltd.

Inventor： Benoit Rivot ,  Xingyu Wang

IPC: B25J9/16

CPC classification number: B25J9/1666 ,  B25J9/163 ,  B25J9/1694

Abstract: Cliff Detection in Robotic Devices A method of operating a robotic device includes: moving the robotic device towards an edge of a cliff while a ToF sensor senses reflected signals having been transmitted by the ToF sensor, the reflected signals being generated by the signals transmitted by the ToF sensor being reflected off a target object back to the ToF sensor, the ToF sensor being attached to a front of the robotic device and including an array of single-photon avalanche diode (SPAD) sensors; comparing a statistical distribution of the reflected signals received at a plurality of different rows of zones configured by the array of SPADs in a region of interest (ROI) of the ToF sensor and based on the comparing detecting an approaching of the edge of the cliff; and in response to detecting the approaching of the edge, changing a propulsion of the robotic device before reaching the edge.

公开(公告)号：US20230216394A1

公开(公告)日：2023-07-06

申请号：US17646934

申请日：2022-01-04

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.

Inventor： Dino Costanzo ,  Xiyu Xu ,  Chengpan Cai

IPC: H02M1/00 ,  H02P5/685 ,  H02P5/505 ,  H02M7/493

CPC classification number: H02M1/0009 ,  H02P5/685 ,  H02P5/505 ,  H02M7/493

Abstract: An apparatus includes a first inverter configured to drive a first motor having a plurality of phases, the first inverter comprising a plurality of inverter legs, each of which is coupled to a corresponding phase of the first motor, a second inverter configured to drive a second motor having a plurality of phases, the second inverter comprising a plurality of inverter legs, each of which is coupled to a corresponding phase of the second motor, and a first current sensor configured to sense currents flowing in the first inverter and the second inverter, wherein the first current sensor is shared by at least by two inverter legs.

公开(公告)号：US11635453B2

公开(公告)日：2023-04-25

申请号：US17378226

申请日：2021-07-16

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Dino Costanzo ,  Cheng Pan Cai ,  Xi Yu Xu

IPC: G01R19/25 ,  H02P27/08 ,  H02M1/00 ,  G01R15/14 ,  H02M7/5387

Abstract: A three-phase load is powered by a PWM (e.g., SVPWM) driven DC-AC inverter having a single shunt-topology. A shunt voltage and a branch voltage of the inverter (across a transistor to be calibrated) are measured during a second period of each SVPWM sector, and the drain-to-source resistance of the calibrated transistor is calculated. During the fourth period of each SVPWM sector, the branch voltage is measured again, and another branch voltage across another transistor is measured. Using the drain-to-source resistance of the calibrated transistor and the voltage across the calibrated transistor measured during the fourth period, the phase current through the calibrated transistor is calculated. Using the other branch voltage measured during the fourth period and the drain-to-source resistance of its corresponding transistor (known from a prior SVPWM sector), the phase current through that transistor is calculated. From the two calculated phase currents, the other phase current can be calculated.

公开(公告)号：US11626757B2

公开(公告)日：2023-04-11

申请号：US16931137

申请日：2020-07-16

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.

Inventor： Jiasheng Wang

IPC: H02J50/12 ,  H02J7/02 ,  H02J7/34 ,  H02J50/80

Abstract: A method and system for operating a power circuit capable of transmitting and receiving wireless power. The method includes determining that the power circuit is operating in receive mode, and, based thereon, having a first equivalent capacitance. The method further includes determining that the power circuit is operating in the transmit mode, and, based thereon, having a second equivalent capacitance. The first equivalent capacitance being different than the second equivalent capacitance.

公开(公告)号：US11463052B2

公开(公告)日：2022-10-04

申请号：US17107269

申请日：2020-11-30

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Shenzhen) R&D Co. Ltd.

Inventor： Hong Wu Lin ,  Giovanni Gonano ,  Edoardo Botti

IPC: H03F3/217 ,  H03K17/687 ,  H03K19/20 ,  H04R3/00

Abstract: In an embodiment, a method for shaping a PWM signal includes: receiving an input PWM signal; generating an output PWM signal based on the input PWM signal by: when the input PWM signal transitions with a first edge of the input PWM signal, transitioning the output PWM signal with a first edge of the output PWM signal; and when the input PWM signal transitions with a second edge before the first edge of the output PWM signal transitions, delaying a second edge of the output PWM signal based on the first edge of the output PWM signal.