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公开(公告)号：US4070618A
公开(公告)日：1978-01-24
申请号：US731971
申请日：1976-10-14
申请人： Elmer L. Thomas
发明人： Elmer L. Thomas
摘要： Phases are measured with a resolution of one degree, and frequencies are measured with a resolution of 0.01 Hz by the same circuitry. An internal voltage-controlled oscillator (VCO) is forced to operate at 360 times the frequency of the incoming test signal by use of a phase-locked loop and a 360 divider. Clock pulses from the VCO are counted throughout an interval of noncoincidence of the original test signal and any phase-shifted version of that test signal, and the count is digitally displayed directly as phase shift in degrees. Clock pulses from the VCO are counted throughout an interval of (1/3.6) second and the resulting count is digitally displayed with the last two digits marked off by a decimal point, as the frequency.
摘要翻译： 相位以一度的分辨率测量，并且通过相同的电路以0.01Hz的分辨率测量频率。 通过使用锁相环和360分频器，内部压控振荡器（VCO）被迫以进入测试信号频率的360倍工作。 来自VCO的时钟脉冲在原始测试信号和该测试信号的任何相移版本的不一致的间隔期间进行计数，并且计数以数字方式直接数字显示为相移（以度为单位）。 来自VCO的时钟脉冲在（1 / 3.6）秒的间隔内进行计数，并且所得到的计数以数字显示，最后两位数字被小数点标记为频率。
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公开(公告)号：US3987365A
公开(公告)日：1976-10-19
申请号：US552238
申请日：1975-02-24
申请人： Tsuguhiro Okada , Akira Endo
发明人： Tsuguhiro Okada , Akira Endo
摘要： A digital frequency comparator circuit comprising two counters connected to a circuit to be driven, in which one of the two counters which earlier issues an output signal is temporarily held, and both the counters are not cleared until the other counter subsequently issues an output signal, whereby an instability in the operation of the circuit to be driven is eliminated.
摘要翻译： 一种数字频率比较器电路，包括连接到待驱动电路的两个计数器，其中暂时保持先前发出输出信号的两个计数器之一，并且两个计数器都不被清除，直到另一个计数器随后发出输出信号， 从而消除了要驱动的电路的操作的不稳定性。
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公开(公告)号：US3936757A
公开(公告)日：1976-02-03
申请号：US515730
申请日：1974-10-17
申请人： Ian T. Band , Kenneth J. MacLeod
发明人： Ian T. Band , Kenneth J. MacLeod
摘要： An automatic gate control system for automatically controlling the gate of a multifunction counter for maximum resolution within a fixed maximum time limit includes a Gate Control Apparatus for Setting the Input Signal Counting Interval patented by Ian T. Band and disclosed in U.S. Pat. No. 3,693,097 issued Sept. 19, 1972, a timer responsive to a Q output of a D-type flip-flop and serially connected with an input of an OR gate and a Q output of the D-type flip-flop. The OR gate applies a set signal to a second flip-flop having a Q output coupled to a "D" input of the first flip-flop.
摘要翻译： 一种用于在固定的最大时限内自动控制多功能计数器的门以实现最大分辨率的自动门控制系统包括：用于设置由Ian T.B2获得专利的输入信号计数间隔的门控装置， 1972年9月19日授权的No.3,693,097，一个响应D型触发器的Q输出并与D型触发器的OR门和Q输出的输入串联连接的定时器。 或门将设置信号施加到具有耦合到第一触发器的“D”输入的Q输出的第二触发器。
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公开(公告)号：US3924183A
公开(公告)日：1975-12-02
申请号：US50581974
申请日：1974-09-13
申请人： NASA , NOSSEN EDWARD J , STARNER EUGENE R
摘要： A method of measuring a desired frequency by comparing it with a standard frequency. The zero crossings of both frequencies are detected. A command pulse is generated at each coincidence and is used to start and stop a pair of frequency counters adapted to count the desired and standard frequencies. A measure of the desired frequency is obtained by multiplying the known standard frequency by the ratio between the desired count and the standard count obtained in the two frequency counters.
摘要翻译： 通过将其与标准频率进行比较来测量期望频率的方法。 检测两个频率的零交叉。 在每次重合时产生一个指令脉冲，并用于启动和停止适合于计算所需和标准频率的一对频率计数器。 通过将已知标准频率乘以期望计数与在两个频率计数器中获得的标准计数之间的比率来获得期望频率的量度。
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公开(公告)号：US3829785A
公开(公告)日：1974-08-13
申请号：US35439573
申请日：1973-04-25
申请人： PHILIPS CORP
发明人： SCHRODER G , MEYER EBRECHT D
摘要： For the measurement of the unknown frequency or period of a measuring signal within a given measuring time interval the number of full cycles of the measuring signal within the measuring time interval are counted in a first group of counting circuits and the fractions of the measuring signal cycles at the beginning and at the end of the measuring time interval are counted with the aid of a clock pulse train of fixed frequency in a second group of counting circuits. For a measuring signal of high frequency, the capacity of the first group should be large, whereas that of the second group need only be small, because the fractions at the beginning and at the end of the measuring time interval are correspondingly small. For a measuring signal of low frequency this is just the other way round, so that the total number of counting circuits is independent of the frequency and is only determined by the required resolution. When these counting circuits are divided into groups in accordance with the frequency of the measuring signal, the required number of counting circuits can be substantially reduced. In order to ensure that the values for determining the unknown frequency are obtained within the measuring time interval only, the counting circuits may be divided into three groups, so that the subsequent computing equipment may also be reduced considerably.
摘要翻译： 对于在给定的测量时间间隔内的测量信号的未知频率或周期的测量，测量时间间隔内的测量信号的全周期数在第一组计数电路中计数，并且测量信号周期的分数 在第二组计数电路中借助于固定频率的时钟脉冲串对测量时间间隔的开始和结束进行计数。 对于高频测量信号，第一组的容量应该较大，而第二组的容量只需要较小，因为测量时间间隔开始和结束时的分数相应较小。 对于低频的测量信号，这恰恰相反，因此计数电路的总数与频率无关，仅由所需的分辨率决定。 当这些计数电路根据测量信号的频率被分成组时，可以显着地减少所需的计数电路数量。 为了确保仅在测量时间间隔内获得用于确定未知频率的值，计数电路可以被分成三组，使得随后的计算设备也可以显着减小。
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96.发明授权Cardiac pacemaker rate/interval computer system 失效CARDIAC PACEMAKER RATE / INTERVAL COMPUTER SYSTEM
公开(公告)号：US3768014A
公开(公告)日：1973-10-23
申请号：US3768014D
申请日：1972-01-28
申请人： GEN ELECTRIC
CPC分类号： G01R23/10 , A61N1/3702
摘要： Information signals taken directly from an implanted pacemaker or remotely by way of a telephone circuit are furnished to a computer which processes the information and displays it in digital form in terms of the pacemaker''s stimulus pulse rate or, alternatively, in terms of the interval between pulses. The existing rate or interval is compared with prior measurements and is used to determine the pacemaker''s residual battery life.
摘要翻译： 从植入式心脏起搏器直接取得的信息或通过电话电路远程获取的信息被提供给处理该信息并以起搏器的刺激脉冲速率的数字形式显示的计算机，或者以脉冲间隔 。 将现有速率或间隔与先前的测量值进行比较，并用于确定起搏器的剩余电池寿命。
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公开(公告)号：US3728524A
公开(公告)日：1973-04-17
申请号：US3728524D
申请日：1971-11-18
申请人： NEWPORT LABOR
发明人： GRAY N
CPC分类号： G01R23/10
摘要： A digital counter which incorporates a circuit to reduce or prevent jitter in output readings. During a time base signal, a fraction count circuit determines the fractional count of input signals. This fractional count information is combined with input signals prior to the time base signal by using a fractional count modifier circuit. The fractional count modifier circuit modifies the phase of the input signals prior to the start of the time base.
摘要翻译： 一个数字计数器，其包含电路以减少或防止输出读数中的抖动。 在时基信号期间，分数计数电路确定输入信号的分数计数。 该分数计数信息通过使用分数计数修改器电路与时基信号之前的输入信号组合。 分数计数修正器电路在时基开始之前修改输入信号的相位。
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公开(公告)号：US3714654A
公开(公告)日：1973-01-30
申请号：US3714654D
申请日：1972-01-06
申请人： US NAVY
摘要： ECM pulse analyzer apparatus for automatically measuring pulse repetition frequency (PRF) and pulsewidth (PW) of incoming pulsed signals received by ECM receivers. Pulsewidth is measured by dual-threshold circuitry which eliminates noise effects by means of a high threshold level which sorts pulses for minimum amplitude and a lower threshold level at which pulsewidth is measured when a pulse exceeds the higher threshold. Pulse repetition frequency is measured by counting PRI during the two periods between the three pulses and converting PRI into PRF by counting up to the stored PRI value at a known rate in a predetermined time period whereby the number of times that the count can proceed is equal to the PRF corresponding to the stored PRI.
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公开(公告)号：US3661147A
公开(公告)日：1972-05-09
申请号：US3661147D
申请日：1969-11-10
申请人： WILLIAM L MASON , DONALD J LANTZ
发明人： MASON WILLIAM L , LANTZ DONALD J
摘要： A pulse rate counter and display applicable for indicating pulse rate of the human body. A counter is advanced at a preset clock rate to measure the time duration between two consecutive pulse beats. Appropriate circuitry determines within which of a group of pulse rate ranges this measured time duration falls. The minimum time per pulse for the determined group is set into the counter and the counter decremented to zero at the preset clock rate. The maximum pulse rate of the group then is preset into the counter and the counter decremented at a selected rate corresponding to the approximate slope of the curve of pulse rate versus time per pulse for the determined group. Decrementing terminates upon occurrence of the third consecutive pulse beat, the contents of the counter then indicating the measured pulse rate.
摘要翻译： 脉搏计数器和显示器适用于指示人体脉搏。 计数器以预设的时钟速率前进，以测量两个连续脉冲间隔之间的持续时间。 适当的电路确定在该测量的持续时间下降的一组脉搏速率范围内的哪一个。 将所确定的组的每个脉冲的最小时间设置到计数器中，并且计数器以预设的时钟速率递减到零。 然后，该组的最大脉冲速率被预设到计数器中，并且计数器以对应于所确定的组的脉冲速率对每个脉冲的时间的曲线的近似斜率的选定速率递减。 递减在第三次连续脉搏节拍出现时终止，计数器的内容则表示所测量的脉搏频率。
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公开(公告)号：US3614619A
公开(公告)日：1971-10-19
申请号：US3614619D
申请日：1970-01-13
申请人： COLLINS RADIO CO
摘要： First and second clock sources are monitored on a digital basis by developing a gating pulse the width of which is proportional to the frequency of one of said oscillators and gating the second oscillator frequency to a binary counter for the duration of the gating pulse whereupon a predetermined count is effected in said counter corresponding to the nominal frequency of each of the oscillator sources. A decoder monitors the count in the binary counter and provides an output when the count corresponds to the nominal value. Deviation of either of the oscillators from its nominal frequency by over a predetermined percentage variation applies more or less pulses at the second oscillator rate to the counter. The total count entered into the counter during a calculation period is then at variance with the decoder and the absence of a decoder output depicts an out of frequency situation.
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