公开(公告)号：US07356747B2

公开(公告)日：2008-04-08

申请号：US11194543

申请日：2005-08-02

申请人： Michael S. Hsiao ,  Kameshwar Chandrasekar

发明人： Michael S. Hsiao ,  Kameshwar Chandrasekar

IPC分类号： G01R31/28

CPC分类号： G01R31/318371 ,  G01R31/318307

摘要： An all solutions automatic test pattern generation (ATPG) engine method uses a decision selection heuristic that makes use of the “connectivity of gates” in the circuit in order to obtain a compact solution-set. The “symmetry in search-states” is analyzed using a “Success-Driven Learning” technique which is extended to prune conflict sub-spaces. A metric is used to determine the use of learnt information a priori, which information is stored and used efficiently during “success driven learning”.

摘要翻译： 所有解决方案自动测试模式生成（ATPG）引擎方法使用决策选择启发式，利用电路中的“连通性”，以获得紧凑的解决方案。 使用“成功驱动学习”技术分析“搜索状态中的对称性”，该技术被扩展到修剪冲突子空间。 一个度量用于先验地确定学习信息的使用，哪些信息在“成功驱动学习”期间被有效地存储和使用。

公开(公告)号：US20080040654A1

公开(公告)日：2008-02-14

申请号：US11890666

申请日：2007-08-06

申请人： Yo Sugawara

发明人： Yo Sugawara

IPC分类号： G06F17/00

CPC分类号： G01R31/318314 ,  G01R31/318371

摘要： According to the present invention, even a user lacking the knowledge of semiconductor testing apparatus can easily generate a test program, and easily perform alternation and correction of the test program. In the present invention, a microprogram of a spreadsheet software being one of the commonly used application software is used to create the test program. Therefore, even a user lacking the knowledge of semiconductor testing apparatus can easily generate a test program, and easily perform alternation and correction of the test program. When the alternation and the correction of the test program are performed, only setting conditions of each sheet are altered and corrected, and the alternation and the correction of the test program are easily performed.

摘要翻译： 根据本发明，即使是缺乏半导体测试装置知识的用户也可以容易地生成测试程序，并且容易地执行测试程序的交替和校正。 在本发明中，使用作为常用应用软件之一的电子表格软件的微程序来创建测试程序。 因此，即使是缺乏半导体测试装置知识的用户也可以容易地生成测试程序，并且容易地执行测试程序的交替和校正。 当执行测试程序的交替和校正时，仅改变和校正每张纸的设置条件，并且易于执行测试程序的交替和校正。

公开(公告)号：US07203882B2

公开(公告)日：2007-04-10

申请号：US10930327

申请日：2004-08-31

申请人： Shai Fine ,  Avi Ziv

发明人： Shai Fine ,  Avi Ziv

IPC分类号： G01R31/28

CPC分类号： G01R31/31813 ,  G01R31/318371

摘要： A coverage-directed test generation technique for functional design verification relies on events that are clustered according to similarities in the way that the events are stimulated in a simulation environment, not necessarily related to the semantics of the events. The set of directives generated by a coverage-directed test generation engine for each event is analyzed and evaluated for similarities with sets of directives for other events. Identified similarities in the sets of directives provide the basis for defining event clusters. Once clusters have been defined, a common set of directives for the coverage-directed test generation engine is generated that attempts to cover all events in a given cluster.

摘要翻译： 用于功能设计验证的面向覆盖的测试生成技术依赖于根据事件在仿真环境中被刺激的方式的相似性聚类的事件，这些事件不一定与事件的语义相关。 针对每个事件由覆盖面向测试生成引擎生成的指令集进行分析，并针对其他事件的指令集进行相似性评估。 在指令集中确定的相似性为定义事件集群提供了基础。 一旦定义了集群，就会生成针对覆盖范围的测试生成引擎的一组常用的指令，试图覆盖给定集群中的所有事件。

公开(公告)号：US20060242498A1

公开(公告)日：2006-10-26

申请号：US10518743

申请日：2003-06-17

申请人： David Hamilton ,  Brian Stimpson ,  Mahmoud Bekheit

发明人： David Hamilton ,  Brian Stimpson ,  Mahmoud Bekheit

IPC分类号： G01R31/28

CPC分类号： G01R31/318342 ,  G01R31/3167 ,  G01R31/318371

摘要： A method of optimising a digital test signal for testing an analogue or mixed-signal circuit comprising determining a measure, for example a figure of merit, that is indicative of differences between the output of a fault free and the output of a known faulty circuit in response to an applied digital input signal. The digital input signal is then varied and another figure of merit is calculated for the fault free and the known faulty circuit for the new input signal. This is repeated a number of times, the digital input signal being varied each time. An optimum test signal is selected based on the determined figures of merit.

摘要翻译： 一种优化用于测试模拟或混合信号电路的数字测试信号的方法，包括确定例如品质因数的度量，其指示无故障的输出与已知故障电路的输出之间的差异 对应用的数字输入信号的响应。 然后，数字输入信号被改变，并为新的输入信号计算出无故障和已知故障电路的另一品质因数。 这是多次重复，数字输入信号每次都变化。 基于确定的品质因数来选择最佳测试信号。

公开(公告)号：US07111209B2

公开(公告)日：2006-09-19

申请号：US10355941

申请日：2003-01-31

申请人： Janusz Rajski ,  Mark Kassab ,  Nilanjan Mukherjee ,  Jerzy Tyszer

发明人： Janusz Rajski ,  Mark Kassab ,  Nilanjan Mukherjee ,  Jerzy Tyszer

IPC分类号： G01R31/28

CPC分类号： G01R31/318335 ,  G01R31/318371 ,  G01R31/318547

摘要： A method for compressing test patterns to be applied to scan chains in a circuit under test. The method includes generating symbolic expressions that are associated with scan cells within the scan chains. The symbolic expressions are created by assigning variables to bits on external input channels supplied to the circuit under test. Using symbolic simulation, the variables are applied to a decompressor to obtain the symbolic expressions. A test cube is created using a deterministic pattern that assigns values to the scan cells to test faults within the integrated circuit. A set of equations is formulated by equating the assigned values in the test cube to the symbolic expressions associated with the corresponding scan cell. The equations are solved to obtain the compressed test pattern.

公开(公告)号：US07099791B2

公开(公告)日：2006-08-29

申请号：US10960532

申请日：2004-10-07

申请人： William A. Fritzsche

发明人： William A. Fritzsche

IPC分类号： G01R27/28 ,  G06F9/44

CPC分类号： G01R31/318371 ,  G01R31/31908 ,  G01R31/31919

摘要： A method for linking compiled pattern data and loading the data into tester hardware includes the steps of generating a composite object that includes a shared resource, determining a local shared resource specific to a test instrument that is associated with the shared resource in the composite object, assigning a local reconciled value or address to the local shared resource, and loading the local shared resource into the test instrument.

摘要翻译： 用于将编译的模式数据和将数据加载到测试器硬件中的方法包括以下步骤：生成包括共享资源的复合对象，确定与复合对象中的共享资源相关联的测试工具特有的本地共享资源， 将本地对帐的值或地址分配给本地共享资源，并将本地共享资源加载到测试仪器中。

公开(公告)号：US20060156262A1

公开(公告)日：2006-07-13

申请号：US11101520

申请日：2005-04-08

申请人： Kenji Abe

发明人： Kenji Abe

IPC分类号： G06F17/50

CPC分类号： G01R31/318342 ,  G01R31/318314 ,  G01R31/318371

摘要： A verification supporting apparatus includes an acquiring unit that acquires a first verification-item list for a verification target, a functional specification of the verification target, and a sequential specification of the verification target; a keyword extracting unit that extracts a keyword about the verification target from the first verification-item list; a creating unit that creates a second verification-item list in which each of the verification items is formed with the functional description and the sequential description about an output action of the verification target; and a converting unit that converts the first verification-item list into a third verification-item list having a same format as the second verification-item list, based on the second verification-item list and the keyword.

摘要翻译： 验证支持装置包括获取单元，其获取验证对象的第一验证项目列表，验证对象的功能指定以及验证对象的顺序指定; 关键词提取单元，从第一验证项列表中提取关于验证对象的关键字; 创建单元，其创建第二验证项列表，其中每个验证项由功能描述和关于验证对象的输出动作的顺序描述形成; 以及转换单元，其基于第二验证项目列表和关键字将第一验证项目列表转换为具有与第二验证项目列表相同的格式的第三验证项目列表。

公开(公告)号：US20060062155A1

公开(公告)日：2006-03-23

申请号：US10711472

申请日：2004-09-21

申请人： Peter Hanping Chen ,  Chih-Fu Chien ,  Jyh-Herng Wang ,  Hsu-Hui Tsai

发明人： Peter Hanping Chen ,  Chih-Fu Chien ,  Jyh-Herng Wang ,  Hsu-Hui Tsai

IPC分类号： H04J1/16

CPC分类号： G01R31/318371

摘要： IP characterization and for path finding methods, and a computer readable recording medium for storing program are provided. First, an Intellectual Property (IP) component is provided. Then, a plurality of test patterns for all paths in the IP component is automatically generated. The test patterns are then sequentially input into the IP component for simulation, and a plurality of corresponding simulation results is generated. Finally, an IP characteristic library is generated based on the simulation results.

摘要翻译： IP表征和路径查找方法，以及用于存储程序的计算机可读记录介质。 首先，提供知识产权（IP）组件。 然后，自动生成IP分量中的所有路径的多个测试模式。 然后将测试模式顺序地输入到IP组件中用于模拟，并且生成多个相应的模拟结果。 最后，根据仿真结果生成IP特征库。

公开(公告)号：US20060048082A1

公开(公告)日：2006-03-02

申请号：US10929935

申请日：2004-08-30

申请人： Roy Emek

发明人： Roy Emek

IPC分类号： G06F17/50

CPC分类号： G06F17/5022 ,  G01R31/318357 ,  G01R31/318371 ,  G06F17/504

摘要： Generation of test cases for functional verification of a complex system-under-test is achieved by the use of a probability matrix. The probability matrix represents a non-uniform distribution function of resource combinations used in the transactions, and can be created randomly, or by application of various types of testing knowledge. The matrix is used by a test generator for selecting resources that participate in a transaction involving an interconnect between different types of system components. Applying the inventive principles increases the quality of design verification by stimulation of both the system's resources and its internal interconnects, with almost no knowledge of the structure of the system.

摘要翻译： 通过使用概率矩阵来实现复杂系统测试的功能验证的测试用例的生成。 概率矩阵表示事务中使用的资源组合的不均匀分布函数，可以随机创建，也可以应用各种类型的测试知识。 该矩阵由测试发生器用于选择参与涉及不同类型的系统组件之间的互连的事务的资源。 应用本发明原理通过刺激系统的资源及其内部互连来提高设计验证的质量，几乎不知道系统的结构。

公开(公告)号：US20050203720A1

公开(公告)日：2005-09-15

申请号：US11015020

申请日：2004-12-20

申请人： Vitaly Lagoon ,  Guy Baruch

发明人： Vitaly Lagoon ,  Guy Baruch

IPC分类号： G06F17/50 ,  G01R31/28 ,  G01R31/3183 ,  G06F20060101 ,  G06F11/00 ,  G06F11/22 ,  G06F17/10

CPC分类号： G01R31/318371 ,  G06F11/263

摘要： A method for enabling bitwise or bit slice constraints to be provided as part of the test generation process, by providing a language structure which enables these constraints to be expressed in a test generation language such as e code for example. The language structure for such bitwise constraints is then handled in a more flexible manner, such that the test generation process does not attempt to rigidly “solve” the expression containing the constraint as a function. Therefore, the propagation of constraints in such a structure do not necessarily need to be propagated from left to right, but instead are generated in a multi-directional manner. The language structure is particularly suitable for such operators as “[: ]”, “|”, “&”, “{circumflex over ( )}”, “˜”, “>>” and “

摘要翻译： 通过提供使得能够以诸如e代码的测试生成语言来表达这些约束的语言结构，能够提供作为测试生成过程的一部分的按位或位片限制的方法。 然后，以更灵活的方式处理这种按位约束的语言结构，使得测试生成过程不试图将包含该约束的表达式作为一个功能刚性地“解决”。 因此，这种结构中约束的传播不一定需要从左向右传播，而是以多方向的方式产生。 语言结构特别适用于“[：]”，“|”，“＆”，“{circumflex over（）}”，“〜”，“>>”和“<<”等运算符。