公开(公告)号：US20050129157A1

公开(公告)日：2005-06-16

申请号：US11007212

申请日：2004-12-09

申请人： Nobuyuki Ashida

发明人： Nobuyuki Ashida

IPC分类号： H03H11/16 ,  H03H11/18 ,  H03H11/22 ,  H03K3/2885 ,  H03K17/60 ,  H04L7/00

CPC分类号： H03K17/603 ,  H03H11/22 ,  H03K3/2885

摘要： The 90-degree phase shifter of the invention has: a T flip-flop including transistors Q3 to Q6 and Q9 to Q12 that together constitute a dual differential circuit, input transistors Q1 and Q2 that receive at their bases an input signal, and input transistors Q7 and Q8 that receive at their bases a signal complementary to the input signal; variable current sources 14 to 17 connected respectively to the nodes between the individual input transistors and the dual differential circuit; and a 90-degree phase comparator 10 that compares the phase differences between the signals outputted from the T flip-flop to output signals commensurate with the deviations of those phase differences from 90 degrees. The variable current sources 14 to 17 are controlled by signals based on the signals outputted from the 90-degree phase comparator 10. This configuration more surely yields output signals with a phase difference of exactly 90 degrees.

摘要翻译： 本发明的90度移相器具有：包括晶体管Q 3至Q 6和Q 9至Q 12的T触发器，它们共同构成双差分电路，在其基极处接收的输入晶体管Q 1和Q 2 输入信号和输入晶体管Q 7和Q 8，它们在其基极处接收与输入信号互补的信号; 可变电流源14至17分别连接到各个输入晶体管和双差分电路之间的节点; 以及90度相位比较器10，其将从T触发器输出的信号之间的相位差与与90度的那些相位差的偏差相称的输出信号进行比较。 可变电流源14至17由基于从90度相位比较器10输出的信号的信号控制。 该配置更可靠地产生具有正好90度的相位差的输出信号。

公开(公告)号：US5983082A

公开(公告)日：1999-11-09

申请号：US962580

申请日：1997-10-31

申请人： Mark Francis Hilbert

发明人： Mark Francis Hilbert

IPC分类号： H03H11/18 ,  H03L7/00 ,  H03L7/081 ,  H04B1/40

CPC分类号： H03L7/00 ,  H03L7/0812 ,  H03H11/18

摘要： A variable phase shift network (420) for a phase quadrature signal generator (320, 370) includes a variable current controller (909), a first NPN transistor (801) and a second NPN transistor (802). The variable phase shift network (420) produces a first quadrature input signal (830), a second quadrature input signal (834), a first quadrature output signal (821) and a second quadrature output signal (826) responsive to receiving a first differential input signal (919) and a second differential input signal (925). The variable current controller (909) controls current in a first NPN transistor (801) to vary an emitter resistance (846) in the first NPN transistor (801) and controls current in a second NPN transistor (802) to vary an emitter resistance (847) in the second NPN transistor (802) to adjust a phase quadrature relationship between the first quadrature output signal (821) and the first quadrature input signal (830) and to adjust a phase quadrature relationship between the second quadrature output signal (826) and the second quadrature input signal (834).

摘要翻译： 用于相位正交信号发生器（320,370）的可变相移网络（420）包括可变电流控制器（909），第一NPN晶体管（801）和第二NPN晶体管（802）。 可变相移网络（420）产生第一正交输入信号（830），第二正交输入信号（834），第一正交输出信号（821）和第二正交输出信号（826），响应于接收第一差分 输入信号（919）和第二差分输入信号（925）。 可变电流控制器（909）控制第一NPN晶体管（801）中的电流以改变第一NPN晶体管（801）中的发射极电阻（846），并且控制第二NPN晶体管（802）中的电流以改变发射极电阻（ 847），以调整第一正交输出信号（821）和第一正交输入信号（830）之间的相位正交关系，并调整第二正交输出信号（826）之间的相位正交关系， 和第二正交输入信号（834）。

公开(公告)号：US5459311A

公开(公告)日：1995-10-17

申请号：US106040

申请日：1993-08-12

申请人： Michael J. Brosnan

发明人： Michael J. Brosnan

IPC分类号： H04B10/02 ,  H03H11/18 ,  H03K5/08 ,  H04B10/04 ,  H04B10/06 ,  H04B10/14 ,  H04B10/18 ,  H04B10/26 ,  H04B10/28 ,  H04L25/03 ,  H01S3/10 ,  H01J40/14

CPC分类号： H03K5/082

摘要： A fiber-optic system includes a photodetector for receiving optical signals from a light source, a threshold producing circuit coupled to the photodetector, and a delay block coupled to the photodetector. The threshold producing circuit produces a decision threshold voltage in response to signals from the photodetector. The delay block, formed of one or more stages of all-pass filter, delays the signals from the photodetector. The outputs of the delay block and the threshold producing circuit are connected to the inputs of a comparator. By providing a delayed signal, the decision threshold voltage is established in the comparator before the delayed signals reach the comparator. In this manner, pulse width distortion is largely eliminated in the first bit of data in burst mode data and the dynamic range of the overall system is preserved. In some cases, a multi-staged delay causes DC offset error in the delayed signal to the comparator. To reduce this error, a DC offset correction circuit coupled to the delay block corrects the DC offset error through the use of negative feedback across the delay block.

摘要翻译： 光纤系统包括用于从光源接收光信号的光电检测器，耦合到光检测器的阈值产生电路，以及耦合到光检测器的延迟块。 阈值产生电路响应于来自光电检测器的信号产生判定阈值电压。 由一个或多个全通滤波器级构成的延迟块延迟来自光电检测器的信号。 延迟块和阈值产生电路的输出连接到比较器的输入端。 通过提供延迟信号，在延迟信号到达比较器之前，在比较器中建立判定阈值电压。 以这种方式，突发模式数据中的数据的第一位中的脉冲宽度失真被很大程度地消除，整个系统的动态范围被保留。 在某些情况下，多级延迟会导致比较器延迟信号中的DC偏移误差。 为了减少该误差，耦合到延迟块的DC偏移校正电路通过在延迟块上使用负反馈校正DC偏移误差。

公开(公告)号：US5345377A

公开(公告)日：1994-09-06

申请号：US968847

申请日：1992-10-30

申请人： Charles W. Edwards

发明人： Charles W. Edwards

IPC分类号： G05F1/70 ,  H02J3/01 ,  H02M1/12 ,  H03H11/04 ,  H03H11/18

CPC分类号： G05F1/70 ,  H02J3/01 ,  H02M1/12 ,  Y02E40/40

摘要： An apparatus and method of constructing a sinusoidal output signal corresponding to a selected harmonic of a sinusoidal input signal is described. The input signal is deconstructed into direct and quadrature components by respectively multiplying it with a selected harmonic of cosine and sine reference signals. The direct and quadrature components contain orthogonal dc components corresponding to the direct and quadrature magnitudes of the input signal at the selected harmonic frequency. The generated direct and quadrature magnitude values are respectively applied to error amplifiers in accordance with the invention. The outputs of the error amplifiers are respectively multiplied by the selected harmonic component of the sine and cosine reference signals. This provides the proper phase values for the respective quadrature and direct processed signals at the selected harmonic frequency. The processed quadrature and direct signals are then summed to yield an output signal which corresponds to the magnitude and phase values of the selected harmonic of the input signal.

摘要翻译： 描述了构成对应于正弦输入信号的所选谐波的正弦输出信号的装置和方法。 通过分别将输入信号与余弦和正弦参考信号的选定谐波相乘，将输入信号解调为直接和正交分量。 直接和正交分量包含对应于所选谐波频率处输入信号的直接和正交幅度的正交直流分量。 所产生的直接和正交幅度值分别应用于根据本发明的误差放大器。 误差放大器的输出分别乘以所选择的正弦和余弦参考信号的谐波分量。 这为所选谐波频率处的各个正交和直接处理的信号提供了适当的相位值。 然后将经处理的正交和直接信号相加以产生对应于输入信号的所选谐波的幅度和相位值的输出信号。

公开(公告)号：US5157288A

公开(公告)日：1992-10-20

申请号：US670070

申请日：1991-03-15

申请人： Stephen R. Hill

发明人： Stephen R. Hill

IPC分类号： G01R21/00 ,  H03H11/18

CPC分类号： G01R21/003 ,  H03H11/18

摘要： A phase shifting circuit includes: a pair of input terminals; a pair of output terminals; a variable gain amplifier and an active alternating current integrator, connected in series between the input terminals and the output terminals; and a control circuit for controlling the gain of the amplifier in dependence on the voltage between the input terminals and the voltage between the output terminals so as to maintain the amplitude of the voltage between the output terminals substantially equal to the amplitude of the voltage between the input terminals. The phase shifting circuit exhibits low variation of phase shift with input signal frequency.

公开(公告)号：US4002930A

公开(公告)日：1977-01-11

申请号：US571750

申请日：1975-04-25

申请人： Hideki Miura

发明人： Hideki Miura

IPC分类号： H01L21/8222 ,  H01L21/331 ,  H01L27/00 ,  H01L27/06 ,  H01L29/73 ,  H03F3/72 ,  H03H11/18 ,  H03H11/20 ,  H04N9/465 ,  H03K17/60 ,  H03K3/286

CPC分类号： H04N9/465 ,  H01L27/00 ,  H03F3/72 ,  H03H11/18 ,  H03H11/20

摘要： A phase switching circuit utilizing a novel bidirectional transistor having a signal applied to its base and a flip-flop circuit arrangement coupled to its output terminals which may be referred to as either collector or emitter depending upon the operation state of the circuit. The flip-flop circuit has a pair of transistors which act as switches and which are respectively coupled in series with the output terminals of the bidirectional transistor. When each of the flip-flop transistors is conducting, a power supply signal is conducted in opposite directions through the bidirectional transistor depending upon which of the transistors is in the on and which is in the off state. Essentially, the switching action of the flip-flop circuit converts the operation of the bidirectional transistor between emitter follower and collector follower configurations, hence the output signal is shifted from a signal which is in phase with the input signal to a signal which is out of phase with that input signal.

摘要翻译： 使用具有施加到其基极的信号的新型双向晶体管的相位切换电路和耦合到其输出端子的触发器电路装置，根据电路的操作状态，可以将其称为集电极或发射极。 触发器电路具有一对作为开关的晶体管，它们分别与双向晶体管的输出端串联耦合。 当每个触发器晶体管导通时，电源信号通过双向晶体管在相反方向上被导通，取决于晶体管中的哪一个处于导通状态并处于关闭状态。 基本上，触发器电路的切换动作将双向晶体管的操作转换为射极跟随器和集电极跟随器配置，因此输出信号从与输入信号同相的信号转移到不在 与该输入信号相位。

公开(公告)号：US3906390A

公开(公告)日：1975-09-16

申请号：US51714774

申请日：1974-10-23

申请人： POST OFFICE

发明人： ROLLETT JOHN MORTIMER

IPC分类号： H03H11/04 ,  H03H7/18 ,  H03H11/12 ,  H03H11/18 ,  H03H11/20 ,  H03F1/36

CPC分类号： H03H11/126

摘要： A network particularly useful in thick or thin film circuitry for use in telecommunication systems provides either an all-pass or notch filter function with the same basic component layout but with variously dimensioned component values. The circuit consists of a differential input operational amplifier having both inverting and non-inverting inputs connected by way of first and second resistors respectively to an input terminal (the second resistor being in parallel with a first capacitor) and having its output terminal connected to its inverting input by way of a third resistor and connected by way of a fourth resistor in series with a second capacitor to its non-inverting input, the network having a reference terminal connected by way of a fifth resistor to the junction between the second capacitor and the fourth resistor so as to provide an input port between the reference terminal and the input terminal and an output port between the reference terminal and the amplifier output.

摘要翻译： 在用于电信系统的厚薄膜电路中特别有用的网络提供具有相同基本组件布局但是具有不同尺寸的组件值的全通或陷波滤波器功能。 该电路包括差分输入运算放大器，其具有分别通过第一和第二电阻器连接到输入端子（第二电阻器与第一电容器并联）并且其输出端子连接到其的第一和第二电阻器的反相和非反相输入端 通过第三电阻器反相输入，并通过与其第二电容器串联的第四电阻器连接到其同相输入端，网络具有通过第五电阻器连接到第二电容器和第二电容器之间的连接点的参考端子 第四电阻器，以便在参考端和输入端之间提供输入端口以及参考端和放大器输出之间的输出端口。

公开(公告)号：US3792362A

公开(公告)日：1974-02-12

申请号：US3792362D

申请日：1972-10-30

申请人： AMDAHL CORP

发明人： GRANT G

IPC分类号： G06F1/04 ,  G06F1/10 ,  G06K20060101 ,  H03H11/18 ,  H03K20060101 ,  H03K5/159

CPC分类号： H03H11/18 ,  G06F1/10

摘要： Disclosed is a clock apparatus for use in a data processing system. The clock pulse width is made substantially equal to the maximum latch delay (MLD) plus the clock skew (CS) for obtaining the minimum number of circuits relative to the maximum clock frequency.

摘要翻译： 公开了一种用于数据处理系统的时钟装置。 时钟脉冲宽度基本上等于最大锁存延迟（MLD）加上时钟偏差（CS），以获得相对于最大时钟频率的最小电路数。

公开(公告)号：US3784934A

公开(公告)日：1974-01-08

申请号：US3784934D

申请日：1972-11-10

申请人： SONY CORP

发明人： OHSAWA M

IPC分类号： H04S5/00 ,  H03H7/18 ,  H03H11/16 ,  H03H11/18 ,  H03H11/22 ,  H04S5/02 ,  H03H7/30

CPC分类号： H03H7/18 ,  H03H11/18 ,  H03H11/22 ,  H04S5/02

摘要： An all-pass phase-shift circuit having an input circuit for supplying signals with reversed phases at first and second terminals, and a phase-shifter bridge circuit with a first capacitor connected in series with a first resistor between the first and second terminals, a second resistor connected in series between the first capacitor and the first resistor, a series connection of a third resistor and a second capacitor connected in parallel with the first resistor, a third capacitor and means for connecting the third capacitor in parallel with the second resistor. A signal applied to the input circuit of the phaseshift circuit is linearly phase-shifted with respect to frequency.

摘要翻译： 一种全通相移电路，具有用于在第一和第二端子处提供反相信号的输入电路，以及具有与第一和第二端子之间的第一电阻器串联连接的第一电容器的移相器桥接电路， 串联连接在第一电容器和第一电阻器之间的第二电阻器，与第一电阻器并联连接的第三电阻器和第二电容器的串联连接，第三电容器和用于将第三电容器与第二电阻器并联连接的装置。 施加到相移电路的输入电路的信号相对于频率线性相移。

公开(公告)号：US3748572A

公开(公告)日：1973-07-24

申请号：US3748572D

申请日：1972-05-04

申请人： HONEYWELL INFORMATION INC

发明人： KIM K ,  SALIGA T

IPC分类号： H03H7/19 ,  H03D3/02 ,  H03D3/06 ,  H03H11/18 ,  H03H11/20 ,  H03H11/22 ,  G05F1/68

CPC分类号： H03H11/18 ,  H03H11/22

摘要： A wide frequency range phase shifter for shifting phase of an ac signal by a predetermined amount with less than one degree phase error over substantially a five to one frequency range. A phase detector compares the phase of an input signal with the phase of the input signal that has been shifted by a predetermined amount and provides an output signal which is a measure of the phase difference between the two inputs. The resulting signal is integrated and applied back to a voltage controlled phase shifter in such a direction so as to correct any error in the amount of the predetermined delay.

摘要翻译： 一种宽频率移相器，用于在基本上五到一个频率范围内以小于一度的相位误差将交流信号的相位相移预定量。 相位检测器将输入信号的相位与已经偏移预定量的输入信号的相位进行比较，并提供作为两个输入之间的相位差的量度的输出信号。 所得到的信号被积分并在这样的方向上被施加回压控移相器，从而校正预定延迟量的任何误差。