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公开(公告)号：US20050144650A1
公开(公告)日：2005-06-30
申请号：US11058076
申请日：2005-02-14
申请人： Dan Tu , Louis Coffin
发明人： Dan Tu , Louis Coffin
IPC分类号： G06F13/00 , H03D3/00 , H03D3/02 , H03D3/06 , H04H60/31 , H04N5/445 , H04N5/50 , H04N7/16 , H04N7/173 , H04H9/00
CPC分类号： H03D3/007
摘要： Methods and systems for processing a single sub-channel that includes two or more combined channels. Using intermediate frequency sub-sampling, two or more channels from a broad band signal are combined into a single sub-channel for further analog and digital processing. Each of the two or more channels is down converted to an intermediate frequency, filtered to remove certain undesired channels, and combined such that the two or more channels are adjacent to each other. A digital representation of the sub-channel is produced from the combined intermediate frequency channels. Each channel within the digital representation is down converted to baseband, and the in-phase and quadrature components are separated from each other. Compared to one direct down conversion technique, intermediate frequency sub-sampling as described in the application may reduce the number of analog to digital converters and control amplifiers used in analog processing by a factor of four.
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公开(公告)号：US5608796A
公开(公告)日：1997-03-04
申请号：US386578
申请日：1995-02-10
申请人： Mihai Banu , Hongmo Wang
发明人： Mihai Banu , Hongmo Wang
CPC分类号： H03H11/22
摘要： Disclosed is an integrated circuit comprising a balanced set of inputs and a phase splitting circuit. The phase splitting circuit has a first input terminal that is coupled to the balanced set of inputs and a second input terminal that is coupled to the balanced set of inputs. The phase splitting circuit further comprises a balanced phase shifting network, a first set of output terminals, and a second set of output terminals. The balanced phase shifting network is coupled to the first: input terminal and the second input terminal. The first set of output terminals provides a voltage representative of a first voltage across a resistive portion of the balanced phase shifting network in response to an input voltage at the balanced set of inputs. The second set of output terminals provides a voltage representative of a second voltage across a reactive portion of the balanced phase shifting network in response to the input voltage at the balanced set of inputs.
摘要翻译： 公开了一种集成电路，其包括平衡输入集合和相分离电路。 相位分离电路具有耦合到平衡输入集合的第一输入端子和耦合到平衡输入集合的第二输入端子。 相分离电路还包括平衡相移网络，第一组输出端子和第二组输出端子。 平衡相移网络耦合到第一：输入端子和第二输入端子。 第一组输出端子响应于平衡输入集合处的输入电压而提供代表平衡相移网络的电阻部分上的第一电压的电压。 第二组输出端子响应于平衡输入集合处的输入电压而提供代表平衡相移网络的无功部分的第二电压的电压。
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3.发明授权FM demodulator with threshold extension and receiver comprising such an FM demodulator 失效具有阈值扩展的FM解调器和包括这样的FM解调器的接收器
公开(公告)号：US5572164A
公开(公告)日：1996-11-05
申请号：US528277
申请日：1995-09-14
CPC分类号： H03D3/003 , H03D3/22 , H03D2200/0082
摘要： An FM demodulator having two input terminals (11, 12), to which FM input signals having 90.degree. phase relation are applied, the said FM demodulator including a phase comparator (1) and a tunable, phase shifting circuit (2), the phase shifting circuit (2) being tuned by the FM demodulator output signal via a feedback path comprising a loop, filter. By adding a compensation filter (5) to the tuning control loop the phase shifting circuit is effectively cancelled from the tuning control loop, thereby making the tuning control loop independent of the bandwidth of the phase shifting circuit (2). Thus the bandwidth of the phase shifting circuit (2) can be reduced for threshold extension.
摘要翻译： 一种FM解调器，具有两个输入端（11,12），所述FM输入信号具有90°相位关系，所述FM解调器包括相位比较器（1）和可调谐移相电路（2），所述相位 移位电路（2）由FM解调器输出信号经由包括环路滤波器的反馈路径调谐。 通过向调谐控制环路添加补偿滤波器（5），有效地从调谐控制环路消除了移相电路，从而使调谐控制环路与相移电路（2）的带宽无关。 因此，为了阈值扩展，可以减小移相电路（2）的带宽。
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公开(公告)号：US5418489A
公开(公告)日：1995-05-23
申请号：US134197
申请日：1993-10-08
申请人： Kevin B. Traylor
发明人： Kevin B. Traylor
CPC分类号： H03D3/007 , H03D7/166 , H03D2200/0039 , H03D2200/0072 , H03D2200/0082 , H03D3/22
摘要： An apparatus and method is provided of recovering a frequency modulated signal having a first component of the frequency modulated signal at a zero-RF spectral location and a second component of the frequency modulated signal at a zero-RF spectral location in quadrature relationship to the first component. The method includes the steps of: upconverting and summing the first and second components to produce a reference signal (100), time delaying the first and second components, upconverting and summing the delayed, upconverted first and second components to produce a delayed reference signal (101) in quadrature relationship to the reference signal; limiting the reference and delayed signal (102); and exclusive or-ing (103) the limited reference and limited delayed signal.
摘要翻译： 提供了一种装置和方法，用于在零RF频谱位置处恢复具有频率调制信号的第一分量的频率调制信号，并将频率调制信号的第二分量与正交关系的零RF频谱位置恢复到第一 零件。 该方法包括以下步骤：对第一和第二分量进行上变频和求和以产生参考信号（100），对第一和第二分量进行时间延迟，对延迟的上变频的第一和第二分量进行上变频和加法，以产生延迟的参考信号（ 101）与参考信号成正交关系; 限制参考和延迟信号（102）; 并且限制（103）有限的参考和有限的延迟信号。
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公开(公告)号：US5404589A
公开(公告)日：1995-04-04
申请号：US79714
申请日：1993-06-18
摘要： An FM receiver with a modulation signal-dependent intermediate frequency (IF) filter tuning, comprising a radio frequency (RF) section, a tunable mixer stage for a down-conversion of a desired RF FM reception signal to an intermediate frequency (IF) FM signal, an IF section comprising a tunable IF filter, and an FM demodulator for demodulating the baseband modulation signal of the IF FM signal. The demodulator is coupled to a baseband signal processing device and an IF tuning control loop couples the FM demodulator to a tuning control input of the IF filter for an instantaneous tuning control of the IF filter by means of the baseband modulation signal. In order to enhance the tuning behaviour, the FM receiver includes a first amplifier-limiter connected in the IF tuning control loop between an output of the FM demodulator and the tuning control input of the IF filter. The gain of said first amplifier-limiter gradually decreases as the input signal increases. The first amplifier-limiter supplies an output signal whose amplitude increases monotonically to a limiting value for a continuous and gradual limitation of the tuning control signal in the IF tuning control loop at an increasing output signal amplitude of the FM demodulator.
摘要翻译： 具有调制信号相关中频（IF）滤波器调谐的FM接收机，包括射频（RF）部分，用于将期望的RF FM接收信号下变频到中频（IF）FM的可调谐混频器级 信号，包括可调谐IF滤波器的IF部分和用于解调IF FM信号的基带调制信号的FM解调器。 解调器耦合到基带信号处理设备，IF调谐控制环路将FM解调器耦合到IF滤波器的调谐控制输入端，借助于基带调制信号对IF滤波器进行瞬时调谐控制。 为了增强调谐行为，FM接收机包括连接在FM调制解调器的输出端和IF滤波器的调谐控制输入之间的IF调谐控制环路中的第一放大器限制器。 所述第一放大器限制器的增益随着输入信号的增加而逐渐减小。 第一个放大器限幅器提供一个输出信号，其幅度以单调调整为限制值，以便在FM解调器的输出信号幅度增加的情况下在IF调谐控制环路中对调谐控制信号的连续和逐渐的限制。
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6.发明授权
公开(公告)号：US5302910A
公开(公告)日：1994-04-12
申请号：US995035
申请日：1992-12-22
申请人： Hiroshi Kondo , Isao Fukai
发明人： Hiroshi Kondo , Isao Fukai
CPC分类号： H03D3/22 , H03D2200/0049 , H03D2200/0082 , H03D3/001 , H03D3/14
摘要： In an FM detector circuit, a phase-shifting circuit is constituted by integrating circuits each consisting of a transconductance amplifier and capacitor. The phase-shifting circuit being arranged to cause limiter signal to be phase-shifted by 90 degrees at center frequency. A multiplying circuit is provided which is arranged to be provided with said limiter signal and output of said phase-shifting circuit, thereby effecting phase-detection of said limiter signal. Further, an error amplifier is provided which is supplied with a smoothed version of detection output derived from said multiplying circuit. The arrangement is made such that output of the error amplifier is applied to the transconductance amplifiers constituting said phase-shifting circuit.
摘要翻译： 在FM检波电路中，由跨导放大器和电容器组成的积分电路构成移相电路。 所述移相电路被布置成使得限幅信号在中心频率相移90度。 提供一个乘法电路，其布置成具有所述限幅器信号和所述移相电路的输出，从而进行所述限幅器信号的相位检测。 此外，提供了一个误差放大器，其被提供有从所述乘法电路得到的检测输出的平滑版本。 使得误差放大器的输出被施加到构成所述移相电路的跨导放大器的布置。
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公开(公告)号：US5166633A
公开(公告)日：1992-11-24
申请号：US796597
申请日：1991-11-22
申请人： Masaharu Ikeda
发明人： Masaharu Ikeda
CPC分类号： H03D3/18
摘要： An angle modulation detector which prevents a demodulated output from being influenced by fluctuations in the amplitudes of signals generated from angle-modulated signal sources such as a phase-modulated signal and a frequency-modulated signal, even if the amplitude of a driving voltage applied to a connection between the bases of a pair of transistors constituting a phase detecting device is made larger in order to enhance the demodulation sensitivity and reduce noise produced during demodulation. As an example of a resolution, the angle modulation detector comprises two coupling devices, two current dividing devices coupled to generate a phase detecting output, a current dividing device coupled to generate a re-mixed output, and a phase detecting device, wherein the outputs of the two coupling devices are connected to the two current driving devices driven by the same signal, so that the respective input and output terminals are at the same voltage level, whereby two outputs thereof are not influenced by fluctuations in amplitudes of angle-modulated signals supplied to the coupling devices.
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8.发明授权
公开(公告)号：US5136254A
公开(公告)日：1992-08-04
申请号：US727459
申请日：1991-07-09
申请人： Hisao Kuwahara
发明人： Hisao Kuwahara
CPC分类号： H03D3/22 , H03B2200/0082 , H03B2200/0092 , H03D13/008 , H03D2200/0049 , H03D2200/0082
摘要： A differential amplifier amplifies an FM signal supplied from an FM signal source. A phase shift circuit shifts a phase of a carrier signal included in an FM signal output from the differential amplifier. A multiplier circuit multiplies an FM signal supplied from the differential amplifier to a first balance input terminal and an FM signal supplied from the phase shift circuit to a second balance input terminal and then outputs a demodulation signal. A resistor serving as a supply means supplies an FM signal, whose carrier signal has a phase opposite to that of a carrier signal of an FM signal supplied from the differential amplifier to an output terminal of the phase shift circuit. The phase characteristics of the phase shift circuit is equivalently controlled and the phase of the FM signal supplied to the multiplier circuit controlled, thereby preventing a demodulation output from being distorted.
摘要翻译： 差分放大器放大从FM信号源提供的FM信号。 移相电路使从差分放大器输出的FM信号中包含的载波信号的相位移位。 乘法器电路将从差分放大器提供的FM信号与从第一平衡输入端提供的第一平衡输入端和FM信号相乘，然后输出解调信号。 用作供给装置的电阻器将载波信号与从差分放大器提供的FM信号的载波信号的相位相反的FM信号提供给相移电路的输出端。 相移电路的相位特性被等效地控制，并且提供给乘法器电路的FM信号的相位被控制，从而防止解调输出失真。
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公开(公告)号：US4568882A
公开(公告)日：1986-02-04
申请号：US655780
申请日：1984-10-01
申请人： Peter S. Single
发明人： Peter S. Single
IPC分类号： H04L27/152 , H03K9/06 , H03D3/00 , H03D3/06
CPC分类号： H04L27/1525
摘要： An FSK demodulator is disclosed suitable for use in a CMOS IC using switched capacitor circuits. The mark and space filters are each modified to produce sine and cosine outputs. These outputs are rectified separately and the result summed. The summed outputs are passed through low pass filters and applied to a comparator which determines which of the mark and space signals is dominant. The invention substantially reduces the size of the demodulator filter capacitors and improves the demodulation signal to noise ratio.
摘要翻译： 公开了适用于使用开关电容器电路的CMOS IC的FSK解调器。 标记和空间滤波器都被修改为产生正弦和余弦输出。 这些输出单独纠正，结果相加。 相加的输出通过低通滤波器并且被施加到比较器，该比较器确定哪个标记和空间信号占主导地位。 本发明基本上减小了解调滤波电容器的尺寸，提高了解调信噪比。
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公开(公告)号：US4531224A
公开(公告)日：1985-07-23
申请号：US507193
申请日：1983-06-23
IPC分类号： H04L7/027 , H04L27/00 , H04L27/227 , H03D3/06 , H04L7/02
CPC分类号： H04L7/0274 , H04L27/2273 , H04L2027/0067
摘要： A low SNR symbol synchronizer utilizes two quadrature channels and a delay and multiply technique to produce four product signals. Two of the product signals are same-channel products and two are cross-channel products. When combined and applied to a synchronizing apparatus such as a Costas loop, the signals provide improved performance at low SNR and avoid the need to know the carrier frequency when setting the delay.
摘要翻译： 低SNR符号同步器利用两个正交信道和延迟和乘法技术来产生四个乘积信号。 两个产品信号是同频道产品，另外两个是交叉通道产品。 当组合并应用于诸如科斯塔斯环路的同步装置时，该信号在低SNR下提供改进的性能，并且避免在设置延迟时知道载波频率。
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