Abstract:
The present invention provides a liquid crystal display including a first substrate including a first alignment layer, gate lines, and data lines, a second substrate facing the first substrate and including a second alignment layer, and a liquid crystal layer disposed between the first substrate and the second substrate. A plurality of pixels are arranged in a matrix defined by the gate lines and the data lines, and alignment directions of the first alignment layer and the second alignment layer in a first pixel are different than alignment directions in a neighboring pixel.
Abstract:
A liquid crystal display is provided that includes first and second panels facing each other, an alignment layer disposed on at least one of the first and second panels, a fixing member disposed on the surface of the alignment layer to fix the alignment structure of the alignment layer, and liquid crystal materials disposed between the first and second panels. The liquid crystal materials include liquid crystal molecules that have a pre-tilt angle and are disposed on the alignment layer.
Abstract:
An organic light emitting display device is disclosed. One embodiment of the organic light emitting display device includes a substrate member in which a plurality of pixel regions are arranged, and a plurality of thin film transistors which are formed on the pixels regions, respectively. The device also includes a data line which is arranged along one side edge of each of the pixel region and a common power source line which is arranged along the other side edge of each of the plurality of pixel regions and is substantially parallel to the data line. The device further includes a first pixel electrode which is electrically connected to one of the plurality of thin film transistors and is formed in each region of the pixel regions. The device also includes an organic film which is formed on the first pixel electrode, and a second pixel electrode which is formed on the organic film. One side edge of the first pixel electrode which is close to the data line is overlapped with the data line.
Abstract:
A memory card changer is disclosed. The memory card changer in accordance with an embodiment of the present invention can include a connector, which interchanges the data with a host device, a built-in memory; a slot, which attaches and detaches the plurality of external memory cards, and a processor, which controls the host device to collectively recognize or individually recognize individual storage capacities of the built-in memory and each of the memory cards inserted in the slot unit. In accordance with the present invention, the memory card changer can collectively manage individual storage capacities of the built-in memory and the plurality of external memory cards inserted in the memory card changer.
Abstract:
A semiconductor device including an edge synchronizer which outputs a synchronized strobe signal generated by synchronizing a transition time point of a strobe signal with clock edges of a main clock or a sub clock, a detector which outputs a phase determination signal indicating a phase difference between the main clock and the sub clock in response to the synchronized strobe signal, and a duty ratio corrector which adjusts a duty ratio of the main clock and the sub clock in response to the phase determination signal.
Abstract:
A display apparatus displays an image in a normal driving mode at a low temperature where a response speed of a liquid crystal becomes lower than a critical value, and displays the image in an impulsive driving mode at a higher temperature where the response speed of the liquid crystal becomes higher than the critical value.
Abstract:
A display device includes: a first panel having a pixel region including a pixel electrode therein; a second panel having a common electrode facing the first panel; a liquid crystal layer having vertically aligned liquid crystal molecules interposed between the first and second panels; a first alignment layer disposed on the pixel electrode; and a second alignment layer disposed on the common electrode. At least one of the pixel electrode and the common electrode has a micro slit pattern. At least one of the first and second alignment layers divides the pixel region into domains, is formed to have pretilt directions corresponding to a given domain, and pretilts the vertically aligned liquid crystal molecules in the given domain. A direction of summed horizontal components of a fringe field at an edge of the pixel region is substantially equal to a direction of summed horizontal components of a pretilt direction of the at least one of the first and second alignment layer.
Abstract:
A buffering circuit of a semiconductor device includes: a first buffer configured to receive a first power voltage and a second power voltage as driving power voltages to buffer an input signal; a power supplier configured to adjust supply amounts of the first and second power voltages in response to a plurality of driving power signals to supply first and second driving power voltages; and a second buffer configured to receive the first and second driving power voltages, and to buffer an output signal of the first buffer.
Abstract:
A display device and a method for driving the same are disclosed. The display device driving method includes applying a first gray scale display voltage according to a first gamma curve to a liquid crystal layer during a first sub-frame period and applying a second gray scale display voltage according to a second gamma curve to the liquid crystal layer during a second sub-frame period. The first and second gamma curves are discontinuous at one or more gray scale values among all gray scale regions.
Abstract:
Disclosed are a display device and a method of driving the same that improve both moving image visibility and lateral visibility. A display panel including gate and data lines arranged in the form of a matrix for displaying an image, a gate driver for driving the gate line, and a data driver for supplying a low gray scale image signal, a high gray scale image signal, and a black impulsive signal to the data line within one frame period.