METHOD AND SYSTEM FOR OBTAINING PATH INFORMATION, PATH COMPUTATION ELEMENT
    101.
    发明申请
    METHOD AND SYSTEM FOR OBTAINING PATH INFORMATION, PATH COMPUTATION ELEMENT 有权
    获取路径信息的方法和系统,路径计算单元

    公开(公告)号:US20100039939A1

    公开(公告)日:2010-02-18

    申请号:US12603347

    申请日:2009-10-21

    申请人: Yan Wang

    发明人: Yan Wang

    IPC分类号: H04L12/56

    CPC分类号: H04L45/04 H04L45/42

    摘要: A method and a system for obtaining path information as well as a PCE are disclosed herein. All the PCEs from the source PCE to the confluent PCE compute the shortest path from the source node to the egress border node of the domain covered by the respective PCE one by one, and send the computation result to the next-hop PCE until the confluent PCE. Meanwhile, all the PCEs from the destination PCE to the confluent PCE compute the shortest path from the destination node to the ingress border node of the domain covered by the respective PCE one by one, and send the computation result to the previous-hop PCE until the confluent PCE. After receiving computation results from the previous-hop PCE and the next-hop PCE, the confluent PCE computes the shortest path between the source node and the destination node, and sends the shortest path to the source PCE.

    摘要翻译: 本文公开了一种用于获得路径信息以及PCE的方法和系统。 从源PCE到汇合PCE的所有PCE计算从各个PCE逐个覆盖的域的源节点到出口边界节点的最短路径,并将计算结果发送到下一跳PCE直到汇合 PCE。 同时,从目的地PCE到汇合PCE的所有PCE逐个计算从目的地节点到相应PCE覆盖的域的入口边界节点的最短路径,并将计算结果发送到上一跳PCE直到 汇合的PCE。 汇聚PCE从前一跳PCE和下一跳PCE接收到计算结果后,计算源节点与目的节点之间的最短路径,并将最短路径发送到源PCE。

    Method and apparatus for improving voice band data (VBD) connectivity in a communications network
    102.
    发明授权
    Method and apparatus for improving voice band data (VBD) connectivity in a communications network 有权
    用于改善通信网络中的语音频带数据(VBD)连接性的方法和装置

    公开(公告)号:US07646763B2

    公开(公告)日:2010-01-12

    申请号:US10961616

    申请日:2004-10-08

    IPC分类号: H04L12/66

    CPC分类号: H04L12/66

    摘要: High compression rate codecs in gateways servicing Voice-over-Internet Protocol (VoIP) and Voice Band Data (VBD) calls distort modem/fax Answer Back Tones (e.g., 2100 Hz), which may lead to signal distortion and call hang-ups. To prevent such occurrences, a method or corresponding apparatus forces originating and terminating gateways to stay in a low complexity non-voice compression codec (e.g., ITU G.711) after prenegotiating a high complexity, voice compression codec (e.g., G.729 or G.726) during a short beginning period of a voice call. The low complexity codec avoids distorted answer back tone leakage associated with previous solutions that use a notch filter to block the leakage, thereby significantly improving the success rate of a VBD call by completely eliminating modem answer back tone distortion caused by high complexity codecs that use voice compression and by completely eliminating use of the notch filter.

    摘要翻译: 通过互联网语音协议(VoIP)和语音频带数据(VBD)的网关中的高压缩率编解码器调用可能导致信号失真和呼叫挂断的调制解调器/传真回答音(例如,2100 Hz)。 为了防止这种情况发生,在预先谈判高复杂度的语音压缩编解码器(例如G.729或者G.711)之后,方法或相应的装置强制发起和终止网关停留在低复杂度的非语音压缩编解码器(例如,ITU G.711) G.726)在语音通话的短的开始阶段。 低复杂度编解码器避免了与使用陷波滤波器阻止泄漏的以前解决方案相关的失真回答音泄漏,从而通过完全消除由使用语音的高复杂度编解码器引起的调制解调器应答回音失真,从而显着提高了VBD呼叫的成功率 并通过完全消除陷波滤波器的使用。

    Method and apparatus for parallel processing multimode LDPC decoder
    103.
    发明申请
    Method and apparatus for parallel processing multimode LDPC decoder 失效
    并行处理多模LDPC解码器的方法和装置

    公开(公告)号:US20090319857A1

    公开(公告)日:2009-12-24

    申请号:US12378775

    申请日:2009-02-19

    申请人: Eran Pisek Yan Wang

    发明人: Eran Pisek Yan Wang

    IPC分类号: H03M13/05 G06F11/10

    摘要: A method and apparatus for decoding transmissions in a wireless communications network is provided. A receiver includes a receive path. The receive path includes a decoder configured to perform low density parity check decoding. The decoder includes a number of Context Reconfigurable Instruction Set Processors (CRISPs). The CRISPs are configured to process received data in parallel. The decoder includes a plurality of memory units, and each of the CRISPs includes a plurality of processors.

    摘要翻译: 提供了一种用于在无线通信网络中解码传输的方法和装置。 接收机包括接收路径。 接收路径包括被配置为执行低密度奇偶校验解码的解码器。 解码器包括多个上下文可重配置指令集处理器(CRISP)。 CRISP被配置为并行处理接收的数据。 解码器包括多个存储器单元,并且每个CRISP包括多个处理器。

    CLAMPING SYSTEM
    104.
    发明申请
    CLAMPING SYSTEM 失效
    夹紧系统

    公开(公告)号:US20090278294A1

    公开(公告)日:2009-11-12

    申请号:US12423112

    申请日:2009-04-14

    IPC分类号: B25B5/00

    摘要: A clamping system for clamping aerofoils. The clamping system has pivotally mounted engagement members that engage the aerofoil mounted on a pivotally mounted arm either side of the pivotal mounting. The arm can pivot as required relative to the item, to accommodate differences in shape in the item, whilst providing a substantially equal clamping force by both engagement members.

    摘要翻译: 用于夹紧翼型的夹紧系统。 夹紧系统具有枢转安装的接合构件,其接合安装在枢转安装件的任一侧上的枢转安装臂上的机翼。 臂可以根据需要相对于物品枢转,以适应物品中的形状差异,同时由两个接合构件提供基本上相等的夹紧力。

    Method and system for optimizing a software-defined radio system
    106.
    发明授权
    Method and system for optimizing a software-defined radio system 有权
    用于优化软件定义无线电系统的方法和系统

    公开(公告)号:US07571205B2

    公开(公告)日:2009-08-04

    申请号:US11173131

    申请日:2005-07-01

    IPC分类号: G06F13/00

    CPC分类号: G06F15/16

    摘要: A method for optimizing a software-defined radio system comprising a plurality of processors is provided. The method includes, for each of the plurality of processors, (i) providing an input burst comprising a first specified burst size, M, of input words to the processor for each of a plurality of configurations, each input word comprising an integer, and (ii) receiving from the processor an output burst comprising a second specified burst size, N, of output words generated by the processor based on the M input words for each of the configurations. An optimization factor is determined for each of the configurations based on the N output words generated by each processor for the configuration. An optimized configuration is identified from the plurality of configurations based on the optimization factor of each of the configurations.

    摘要翻译: 提供了一种用于优化包括多个处理器的软件定义的无线电系统的方法。 所述方法包括对于所述多个处理器中的每一个,(i)为多个配置中的每一个提供包括输入字的第一指定突发尺寸M到输入字的输入脉冲串,每个输入字包括整数,以及 (ii)从处理器接收输出脉冲串,其包括由处理器基于每个配置的M个输入字产生的输出字的第二指定突发大小N。 基于由每个处理器为该配置生成的N个输出字,为每个配置确定优化因子。 基于每个配置的优化因素,从多个配置中识别出优化的配置。

    Substituted 2-aminoacetamides and the use thereof
    108.
    发明授权
    Substituted 2-aminoacetamides and the use thereof 失效
    取代的2-氨基乙酰胺及其用途

    公开(公告)号:US07541465B2

    公开(公告)日:2009-06-02

    申请号:US11443174

    申请日:2006-05-31

    摘要: The invention is directed to substituted 2-aminoacetamides represented by formula (II): and to pharmaceutically acceptable salts and prodrugs thereof, wherein the substituents are defined herein. The invention is also directed to the use of substituted 2-aminoacetamides in methods for the treatment of neuronal damage following global and focal ischemia, and for the treatment, prevention or amelioration of pain, as anticonvulsants, as antimanic depressants, as local anesthetics, as antiarrhythmics and for the treatment or prevention of diabetic neuropathy.

    摘要翻译: 本发明涉及由式(II)表示的取代的2-氨基乙酰胺及其药学上可接受的盐和前药,其中取代基在本文中定义。 本发明还涉及取代的2-氨基乙酰胺在治疗全球和局灶性缺血后的神经元损伤的方法中的用途,以及用作治疗,预防或改善疼痛的抗惊厥药作为抗痉挛剂,作为局部麻醉剂,如 抗心律失常药物和治疗或预防糖尿病性神经病变。

    Reconfigurable signal processor architecture using multiple complex multiply-accumulate units
    110.
    发明申请
    Reconfigurable signal processor architecture using multiple complex multiply-accumulate units 审中-公开
    可重构的信号处理器架构,使用多个复数乘法单元

    公开(公告)号:US20070106720A1

    公开(公告)日:2007-05-10

    申请号:US11584175

    申请日:2006-10-20

    IPC分类号: G06F7/38

    CPC分类号: G06F7/5443 H04B1/0003

    摘要: A reconfigurable digital signal processor (DSP) comprises: a reconfigurable data path comprising a plurality of reconfigurable multiply-accumulate (MAC) units; and a programmable finite state machine for controlling the plurality of reconfigurable MAC units. The programmable finite state machine executes a first plurality of context-related instructions that cause selected ones of the plurality of reconfigurable MAC units to perform at least one of a defined set of functions consisting essentially of: i) Fourier transform functions; and ii) filter functions. The Fourier transform functions comprise a Fast Fourier Transform (FFT) function and an Inverse Fast Fourier Transform (FFT) function and the filter functions comprise a finite impulse response (FIR) filter function and an infinite impulse response (IIR) filter function.

    摘要翻译: 可重配置数字信号处理器(DSP)包括:可重构数据路径,其包括多个可重构的乘法累加(MAC)单元; 以及用于控制多个可重构MAC单元的可编程有限状态机。 所述可编程有限状态机执行第一多个上下文相关指令,所述第一多个上下文相关指令使得所述多个可重新配置的MAC单元中的所选择的指令执行至少一个定义的功能集合,所述功能集合主要包括:i)傅立叶变换函数; 和ii)过滤功能。 傅立叶变换函数包括快速傅立叶变换(FFT)函数和快速傅里叶逆变换(FFT)函数,滤波器函数包括有限脉冲响应(FIR)滤波函数和无限脉冲响应(IIR)滤波函数。