Carbon Nanotubes As Low Voltage Field Emission Sources for Particle Precipitators
    101.
    发明申请
    Carbon Nanotubes As Low Voltage Field Emission Sources for Particle Precipitators 失效
    碳纳米管作为低电场场发射源用于颗粒沉淀器

    公开(公告)号:US20080257156A1

    公开(公告)日:2008-10-23

    申请号:US12125442

    申请日:2008-05-22

    IPC分类号: B03C3/38 B03C3/00

    摘要: An air particle precipitator and a method of air filtration comprise a housing unit; a first conductor in the housing unit; a second conductor in the housing unit; and a carbon nanotube grown on the second conductor. Preferably, the first conductor is positioned opposite to the second conductor. The air particle precipitator further comprises an electric field source adapted to apply an electric field to the housing unit. Moreover, the carbon nanotube is adapted to ionize gas in the housing unit, wherein the ionized gas charges gas particulates located in the housing unit, and wherein the first conductor is adapted to trap the charged gas particulates. The air particle precipitator may further comprise a metal layer over the carbon nanotube.

    摘要翻译: 空气颗粒除尘器和空气过滤方法包括壳体单元; 住房单元中的第一个导体; 壳体单元中的第二导体; 和在第二导体上生长的碳纳米管。 优选地,第一导体与第二导体相对定位。 空气粒子除尘器还包括适于向壳体单元施加电场的电场源。 此外,碳纳米管适于使壳体单元中的气体电离,其中电离气体对位于壳体单元中的气体微粒进行充电,并且其中第一导体适于捕集带电气体微粒。 空气颗粒除尘器还可以包括在碳纳米管上的金属层。

    METHOD OF MAKING INTEGRATED CIRCUIT (IC) INCLUDING AT LEAST ONE STORAGE CELL
    102.
    发明申请
    METHOD OF MAKING INTEGRATED CIRCUIT (IC) INCLUDING AT LEAST ONE STORAGE CELL 有权
    制造集成电路(IC)的方法,包括至少一个存储单元

    公开(公告)号:US20080248624A1

    公开(公告)日:2008-10-09

    申请号:US12136158

    申请日:2008-06-10

    IPC分类号: H01L21/00 H01L21/20

    摘要: A storage cell, integrated circuit (IC) chip with one or more storage cells that may be in an array of the storage cells and a method of forming the storage cell and IC. Each storage cell includes a stylus, the tip of which is phase change material. The phase change tip may be sandwiched between an electrode and conductive material, e.g., titanium nitride (TiN), tantalum nitride (TaN) or n-type semiconductor. The phase change layer may be a chalcogenide and in particular a germanium (Ge), antimony (Sb), tellurium (Te) (GST) layer.

    摘要翻译: 具有一个或多个存储单元的存储单元,集成电路(IC)芯片,其可以是存储单元阵列,以及形成存储单元和IC的方法。 每个存储单元包括触针,其尖端是相变材料。 相变尖端可以夹在电极和导电材料之间,例如氮化钛(TiN),氮化钽(TaN)或n型半导体。 相变层可以是硫族化物,特别是锗(Ge),锑(Sb),碲(Te)(GST)层。

    Carbon nanotubes as low voltage field emission sources for particle precipitators
    104.
    发明授权
    Carbon nanotubes as low voltage field emission sources for particle precipitators 失效
    碳纳米管作为颗粒除尘器的低电压场发射源

    公开(公告)号:US07402194B2

    公开(公告)日:2008-07-22

    申请号:US11161220

    申请日:2005-07-27

    IPC分类号: B03C3/60

    摘要: An air particle precipitator and a method of air filtration include a housing unit; a first conductor in the housing unit; a second conductor in the housing unit; and a carbon nanotube grown on the second conductor. Preferably, the first conductor is positioned opposite to the second conductor. The air particle precipitator further includes an electric field source adapted to apply an electric field to the housing unit. Moreover, the carbon nanotube is adapted to ionize gas in the housing unit, wherein the ionized gas charges gas particulates located in the housing unit, and wherein the first conductor is adapted to trap the charged gas particulates. The air particle precipitator may further include a metal layer over the carbon nanotube.

    摘要翻译: 空气颗粒除尘器和空气过滤方法包括壳体单元; 住房单元中的第一个导体; 壳体单元中的第二导体; 和在第二导体上生长的碳纳米管。 优选地,第一导体与第二导体相对定位。 空气粒子除尘器还包括适于向壳体单元施加电场的电场源。 此外,碳纳米管适于使壳体单元中的气体电离,其中电离气体对位于壳体单元中的气体微粒进行充电,并且其中第一导体适于捕集带电气体微粒。 空气粒子沉淀器还可以包括在碳纳米管上的金属层。

    Semiconductor transistors with contact holes close to gates
    105.
    发明授权
    Semiconductor transistors with contact holes close to gates 有权
    具有靠近门的接触孔的半导体晶体管

    公开(公告)号:US07381610B2

    公开(公告)日:2008-06-03

    申请号:US11163966

    申请日:2005-11-04

    IPC分类号: H01L21/8238

    摘要: A structure and a method for forming the same. The structure includes (a) a semiconductor layer including a channel region disposed between first and second S/D regions; (b) a gate dielectric region on the channel region; (c) a gate region on the gate dielectric region and electrically insulated from the channel region by the gate dielectric region; (d) a protection umbrella region on the gate region, wherein the protection umbrella region comprises a first dielectric material, and wherein the gate region is completely in a shadow of the protection umbrella region; and (e) a filled contact hole (i) directly above and electrically connected to the second S/D region and (ii) aligned with an edge of the protection umbrella region, wherein the contact hole is physically isolated from the gate region by an inter-level dielectric (ILD) layer which comprises a second dielectric material different from the first dielectric material.

    摘要翻译: 一种结构及其形成方法。 该结构包括(a)包括设置在第一和第二S / D区之间的沟道区的半导体层; (b)沟道区上的栅介质区; (c)栅极电介质区域上的栅极区域,并且通过栅极电介质区域与沟道区域电绝缘; (d)栅极区域上的保护伞区域,其中保护伞区域包括第一介电材料,并且其中栅极区域完全处于保护伞区域的阴影中; 和(e)直接在第二S / D区域上方并电连接到第二S / D区域的填充接触孔(i)和(ii)与保护伞区域的边缘对准,其中接触孔通过一个 层间介电层(ILD)层,其包括不同于第一介电材料的第二电介质材料。

    Borderless contact structures
    109.
    发明授权
    Borderless contact structures 有权
    无边界接触结构

    公开(公告)号:US07335930B2

    公开(公告)日:2008-02-26

    申请号:US11679873

    申请日:2007-02-28

    IPC分类号: H01L27/148

    摘要: An SRAM cell. The SRAM cell including: a first gate segment common to a first PFET and a first NFET, a second gate segment common to a second PFET and a second NFET; a first silicide layer contacting a first end of the first gate segment and a drain of the second PFET; a second silicide layer contacting a sidewall contact region of the second gate segment and a drain of the first PFET; a third silicide layer contacting a sidewall contact region of the first gate segment and a drain of the second NFET; a fourth silicide layer contacting a first end of the second gate segment, a drain of the first PFET and a drain of a fourth NFET; and a fifth silicide layer contacting a second end of the first gate segment and a drain of a third NFET.

    摘要翻译: 一个SRAM单元。 该SRAM单元包括:第一PFET和第一NFET公共的第一栅极段,与第二PFET和第二NFET共用的第二栅极段; 接触第一栅极段的第一端和第二PFET的漏极的第一硅化物层; 接触第二栅极段的侧壁接触区域和第一PFET的漏极的第二硅化物层; 接触第一栅极段的侧壁接触区域和第二NFET的漏极的第三硅化物层; 接触第二栅极段的第一端的第四硅化物层,第一PFET的漏极和第四NFET的漏极; 以及接触第一栅极段的第二端和第三NFET的漏极的第五硅化物层。