公开(公告)号：US20140215424A1

公开(公告)日：2014-07-31

申请号：US13994882

申请日：2013-01-30

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： Kevin Fine ,  Ezekiel Kruglick

IPC: G06F17/50

CPC classification number: G06F17/5054

Abstract: Technologies related to dynamic reconfiguration of programmable hardware are generally described. In some examples, coprocessor regions in programmable hardware such as a Field Programmable Gate Array (FPGA) may be dynamically assigned to transition the FPGA from a starting arrangement of coprocessor regions to an efficient arrangement. A placement algorithm may be executed to determine the efficient arrangement, and a path finding algorithm may be executed to determine path finding operations leading from the starting arrangement to the efficient arrangement. The path finding operations may be performed to implement the transition.

Abstract translation: 通常描述与可编程硬件的动态重新配置相关的技术。 在一些示例中，诸如现场可编程门阵列（FPGA）的可编程硬件中的协处理器区域可以被动态分配以将FPGA从协处理器区域的启动布置转换到有效的布置。 可以执行放置算法以确定有效的布置，并且可以执行路径查找算法以确定从起始布置到有效布置的路径查找操作。 可以执行路径查找操作以实现转换。

公开(公告)号：US20140173407A1

公开(公告)日：2014-06-19

申请号：US13885996

申请日：2012-12-17

Applicant: Empire Technology Development LLC

Inventor： Ezekiel Kruglick

IPC: G06F17/24

CPC classification number: G06F17/243 ,  G06F3/0482 ,  G06F17/276

Abstract: Technologies are presented for a multi-step progressive auto-fill function that allows a series of gestures or touches to activate and guide an auto-fill function suitable for information entry. A first gesture may call forth a group of contextual domains for information. A subsequent gesture or motion may cause the selection of a contextual domain, and another action may allow the selection of particular content for placement at a location indicated by the first gesture.

Abstract translation: 提供了一种多步渐进自动填充功能的技术，允许一系列手势或触摸来激活和引导适合信息输入的自动填充功能。 第一个手势可能会呼出一组上下文信息。 随后的手势或动作可以导致对上下文域的选择，并且另一动作可以允许选择特定内容以放置在由第一手势指示的位置。

公开(公告)号：US20140164400A1

公开(公告)日：2014-06-12

申请号：US13991382

申请日：2012-12-07

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： Ezekiel Kruglick

IPC: G06F17/30

CPC classification number: G06F17/2705 ,  G06F9/547 ,  G06F17/30737 ,  G06F17/30867 ,  G06F17/30887 ,  G06F17/30893 ,  H04L41/0266 ,  H04L67/16

Abstract: Technologies related to personal assistant context building are generally described. In some examples, network service communications, such as network traffic resulting from the use of mobile applications or “apps” on a mobile device, may be captured, parsed, and included in personal assistant context databases for use in configuring automated personal assistant user interaction operations. In some examples, parsing services may be provided to parse forwarded network service communications and generate converted data for inclusion in personal assistant context databases.

Abstract translation: 通常描述与个人助理上下文建立相关的技术。 在一些示例中，诸如在移动设备上使用移动应用或“应用”导致的网络流量的网络服务通信可以被捕获，解析并包含在个人助理上下文数据库中，以用于配置自动化的个人助理用户交互 操作。 在一些示例中，可以提供解析服务以解析转发的网络服务通信并生成转换的数据以包含在个人助理上下文数据库中。

公开(公告)号：US20140078823A1

公开(公告)日：2014-03-20

申请号：US13810324

申请日：2012-09-18

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC.

Inventor： Ezekiel Kruglick

IPC: G11C13/00

CPC classification number: G11C13/0004 ,  G11C7/04 ,  G11C13/0069 ,  G11C2013/008

Abstract: Technologies are generally described herein for managing heat within a phase change memory (PCM) structure utilizing electrocaloric effect materials. Some example PCM structures may include an electrocaloric effect material layer thermally coupled to an array of PCM cells. The electrocaloric effect material layer may be segmented so that activation of each segment is coordinated with a subset of the PCM cells within the array. While excess heat emanates from a PCM cell during memory operations, a corresponding electrocaloric effect material segment may be activated to decrease the thermal resistance of the electrocaloric effect material, which transfers the excess heat away from the neighboring PCM cells.

Abstract translation: 本文通常描述技术来在利用电热效应材料的相变存储器（PCM）结构内管理热量。 一些示例PCM结构可以包括热耦合到PCM单元阵列的电热效应材料层。 可以将电热效应材料层分段，使得每个段的激活与阵列内的PCM单元的子集协调。 虽然在存储器操作期间从PCM单元发出多余的热量，但是可以激活相应的电热效应材料段，以降低电热效应材料的热阻，其将多余的热量从相邻的PCM单元传递。

公开(公告)号：US10517024B2

公开(公告)日：2019-12-24

申请号：US15979209

申请日：2018-05-14

Applicant: Empire Technology Development LLC

Inventor： Ezekiel Kruglick

IPC: H04W36/00 ,  H04W64/00 ,  H04W36/32 ,  H04W36/14 ,  H04W16/28

Abstract: Examples are disclosed for a wireless device handoff between a first wireless network and a second wireless network.

公开(公告)号：US10380206B2

公开(公告)日：2019-08-13

申请号：US14851226

申请日：2015-09-11

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： Ezekiel Kruglick

IPC: G06F16/00 ,  G06F16/9535 ,  G06F16/957 ,  G06N5/04 ,  G10L15/26

Abstract: Techniques described herein generally relate to real time inference based systems. Example embodiments may set forth devices, methods, and computer programs related to search engine inference based virtual assistance. One example method may include a computing device adapted to receive text as input and a computer processor arranged to determine at least one inference regarding subject matter of the text based on one or more web searches of one or more terms within the text. The inference(s) may then be automatically displayed upon the inference(s) being determined. The text may be automatically received as input from a voice-to-text converter as voice-to-text conversion producing the text is occurring.

公开(公告)号：US10169211B2

公开(公告)日：2019-01-01

申请号：US15462994

申请日：2017-03-20

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： Ezekiel Kruglick

IPC: G06F11/36

Abstract: Technologies and implementations for providing an application programming interface (API) testing services for transferring data center services. In some examples, multiple API calls used by a service at an origin data center are converted into respective test segments. An API test module including each of the test segments is formed for a multiple number of target data centers and the API test module is transmitted from the origin data center to the target data centers for execution at the target data centers. One or more test results based at least in part on the transmitted API test module being executed at the target data centers are received, and a report based on the one or more test results that indicates which of the application programming interface calls from the origin data center are compatible with the target data centers is generated.

公开(公告)号：US20180368032A1

公开(公告)日：2018-12-20

申请号：US15979209

申请日：2018-05-14

Applicant: Empire Technology Development LLC

Inventor： Ezekiel Kruglick

IPC: H04W36/00 ,  H04W36/32 ,  H04W64/00 ,  H04W16/28 ,  H04W36/14

CPC classification number: H04W36/0083 ,  H04W16/28 ,  H04W36/0055 ,  H04W36/14 ,  H04W36/32 ,  H04W64/00

Abstract: Examples are disclosed for a wireless device handoff between a first wireless network and a second wireless network.

公开(公告)号：US10042621B2

公开(公告)日：2018-08-07

申请号：US14379630

申请日：2013-08-08

Applicant: Empire Technology Development LLC

Inventor： Ezekiel Kruglick ,  Kevin S. Fine

IPC: G06F9/45 ,  G06F9/30 ,  G06F9/455 ,  G06F15/80 ,  G06F8/41

Abstract: In one example embodiment, live migration in a datacenter may include JIT compiling a process that is configured to be executed on both a source instruction set architecture and a destination instruction set architecture, mapping variables and address stacks of the process on both the source instruction set architecture and the destination instruction set architecture into a labeled form thereof, and mapping the labeled form of the variables and address stacks onto the destination instruction set architecture.

公开(公告)号：US09990212B2

公开(公告)日：2018-06-05

申请号：US14360657

申请日：2013-02-19

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： Ezekiel Kruglick

IPC: G06F9/44 ,  G06F11/34 ,  G06F11/30 ,  G01R31/3185 ,  G06F11/277 ,  G06F9/445

CPC classification number: G06F9/44505 ,  G01R31/318519 ,  G06F11/277 ,  G06F11/3024 ,  G06F11/3409

Abstract: Techniques described herein generally include methods for the testing and repair of a hardware accelerator image in a programmable logic circuit. In a processor chip that includes multiple programmable logic circuits, a hardware accelerator image programmed into a first programmable logic circuit is tested by programming a testing circuit with a duplicate hardware accelerator image and bringing the testing circuit to the same logic state as the first programmable logic circuit. Comparing outputs from the first programmable logic circuit and the testing circuit indicates the accuracy of the hardware accelerator image programmed into the first programmable logic circuit. The testing circuit may replace the first programmable logic circuit, or the testing circuit may be reprogrammed for testing other hardware accelerator images programmed into other programmable logic circuits of the processor chip.