公开(公告)号：US11977977B2

公开(公告)日：2024-05-07

申请号：US16917221

申请日：2020-06-30

Applicant: Micron Technology, Inc.

Inventor： David R. Brown ,  Harold B Noyes

IPC: G06N3/08 ,  G06N3/063 ,  G06V10/94

CPC classification number: G06N3/08 ,  G06N3/063 ,  G06V10/955

Abstract: A device includes a match element that includes a first data input configured to receive a first result, wherein the first result is of an analysis performed on at least a portion of a data stream by an element of a state machine. The match element also includes a second data input configured to receive a second result, wherein the second result is of an analysis performed on at least a portion of the data stream by another element of the state machine. The match element further includes an output configured to selectively provide the first result or the second result.

公开(公告)号：US11947979B2

公开(公告)日：2024-04-02

申请号：US17736399

申请日：2022-05-04

Applicant: Micron Technology, Inc.

Inventor： Harold B Noyes ,  David R. Brown ,  Paul Glendenning

IPC: G06F13/16 ,  G06F9/448 ,  G06F13/12 ,  G06F13/28 ,  G06F13/38 ,  G06F13/42

CPC classification number: G06F9/4498 ,  G06F13/126 ,  G06F13/1673 ,  G06F13/28 ,  G06F13/38 ,  G06F13/4282

Abstract: A device, includes an instruction buffer. The instruction buffer is configured to store instructions related to at least a portion of a data stream to be analyzed by a state machine engine as the device. The state machine engine includes configurable elements configured to analyze the at least a portion of a data stream and to selectively output the result of the analysis. Additionally, the instruction buffer is configured to receive the indications as part of a direct memory access (DMA) transfer.

公开(公告)号：US11816493B2

公开(公告)日：2023-11-14

申请号：US16951616

申请日：2020-11-18

Applicant: Micron Technology, Inc.

Inventor： Paul Glendenning ,  Jeffery M. Tanner ,  Michael C. Leventhal ,  Harold B Noyes

IPC: G06F9/448 ,  G06F8/30

CPC classification number: G06F9/4498 ,  G06F8/31

Abstract: A markup language is provided. The markup language describes the composition of automata networks. For example, the markup language uses elements that represent automata processing resources. These resources may include at least one of a state transition element, a counter element, and a Boolean element as respective automata processing resources.

公开(公告)号：US20230342315A9

公开(公告)日：2023-10-26

申请号：US17184372

申请日：2021-02-24

Applicant: Micron Technology, Inc.

Inventor： Harold B Noyes ,  Steven P. King

IPC: G06F13/28 ,  G06F13/38 ,  G06F13/40

CPC classification number: G06F13/28 ,  G06F13/38 ,  G06F13/4027 ,  G06F13/4004 ,  G06F13/385

Abstract: Disclosed are devices and methods, among which is a device peripheral to a controller device that is used to provide memory access to the controller device. In some embodiments, the device may determine and provide a response of the device to requests from the separate device.

公开(公告)号：US20230297529A1

公开(公告)日：2023-09-21

申请号：US18300112

申请日：2023-04-13

Applicant: Micron Technology, Inc.

Inventor： Harold B Noyes ,  Steven P. King

IPC: G06F13/28 ,  G06F13/38 ,  G06F13/40

CPC classification number: G06F13/28 ,  G06F13/38 ,  G06F13/385 ,  G06F13/4004 ,  G06F13/4027

Abstract: Disclosed are devices and methods, among which is a pattern-recognition processor coupled to a microcontroller. The pattern-recognition processor may act as a peripheral device to the microcontroller and provide supplemental pattern recognition functionality to the existing functionality of the microcontroller.

公开(公告)号：US11226926B2

公开(公告)日：2022-01-18

申请号：US16884302

申请日：2020-05-27

Applicant: Micron Technology, Inc.

Inventor： Harold B Noyes ,  David R. Brown

IPC: G06F15/80 ,  H03K19/17728 ,  G06F16/903 ,  G06K9/00 ,  G06N5/00

Abstract: Multi-level hierarchical routing matrices for pattern-recognition processors are provided. One such routing matrix may include one or more programmable and/or non-programmable connections in and between levels of the matrix. The connections may couple routing lines to feature cells, groups, rows, blocks, or any other arrangement of components of the pattern-recognition processor.

公开(公告)号：US20210158163A1

公开(公告)日：2021-05-27

申请号：US17161210

申请日：2021-01-28

Applicant: Micron Technology, Inc.

Inventor： Harold B Noyes

IPC: G06N3/08 ,  G06F1/3206 ,  G06K9/00 ,  G06F1/3287

Abstract: A device includes a state machine. The state machine includes a plurality of blocks, where each of the blocks includes a plurality of rows. Each of these rows includes a plurality of programmable elements. Furthermore, each of the programmable elements are configured to analyze at least a portion of a data stream and to selectively output a result of the analysis. Each of the plurality of blocks also has corresponding block activation logic configured to dynamically power-up the block.

公开(公告)号：US10949290B2

公开(公告)日：2021-03-16

申请号：US16547241

申请日：2019-08-21

Applicant: Micron Technology, Inc.

Inventor： Harold B Noyes ,  David R. Brown ,  Paul Glendenning

IPC: G11C29/00 ,  G06F11/10 ,  H03M13/09

Abstract: Configuration content of electronic devices used for data analysis may be altered due to bit failure or corruption, for example. Accordingly, in one embodiment, a device includes a plurality of blocks, each block of the plurality of blocks includes a plurality of rows, each row of the plurality of rows includes a plurality of configurable elements, each configurable element of the plurality of configurable elements includes a data analysis element including a memory component programmed with configuration data. The data analysis element is configured to analyze at least a portion of a data stream based on the configuration data and to output a result of the analysis. The device also includes an error detection engine (EDE) configured to perform integrity validation of the configuration data.

公开(公告)号：US20210073004A1

公开(公告)日：2021-03-11

申请号：US16951616

申请日：2020-11-18

Applicant: Micron Technology, Inc.

Inventor： Paul Glendenning ,  Jeffrey M. Tanner ,  Michael C. Leventhal ,  Harold B Noyes

IPC: G06F9/448 ,  G06F8/30

Abstract: A markup language is provided. The markup language describes the composition of automata networks. For example, the markup language uses elements that represent automata processing resources. These resources may include at least one of a state transition element, a counter element, and a Boolean element as respective automata processing resources.

公开(公告)号：US10915450B2

公开(公告)日：2021-02-09

申请号：US16513418

申请日：2019-07-16

Applicant: Micron Technology, Inc.

Inventor： David R. Brown ,  Harold B Noyes ,  Inderjit Singh Bains

IPC: G06F3/06 ,  G06F12/08 ,  G06F12/0875 ,  G06F9/448 ,  G06N3/02

Abstract: A data analysis system to analyze data. The data analysis system includes a data buffer configured to receive data to be analyzed. The data analysis system also includes a state machine lattice. The state machine lattice includes multiple data analysis elements and each data analysis element includes multiple memory cells configured to analyze at least a portion of the data and to output a result of the analysis. The data analysis system includes a buffer interface configured to receive the data from the data buffer and to provide the data to the state machine lattice.