公开(公告)号：US11239078B2

公开(公告)日：2022-02-01

申请号：US16921032

申请日：2020-07-06

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Shih-Chun Huang ,  Chiu-Hsiang Chen ,  Ya-Wen Yeh ,  Yu-Tien Shen ,  Po-Chin Chang ,  Chien Wen Lai ,  Wei-Liang Lin ,  Ya Hui Chang ,  Yung-Sung Yen ,  Li-Te Lin ,  Pinyen Lin ,  Ru-Gun Liu ,  Chin-Hsiang Lin

IPC: H01L21/302 ,  H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/027 ,  H01L21/02 ,  H01L21/265 ,  H01L21/3115

Abstract: A method of manufacturing a semiconductor device including operations of forming a first hard mask over an underlying layer on a substrate by a photolithographic and etching method, forming a sidewall spacer pattern having a first sidewall portion and a second sidewall portion on opposing sides of the first hard mask, etching the first sidewall portion, etching the first hard mask and leaving the second sidewall portion bridging a gap of the etched first hard mask, and processing the underlying layer using the second hard mask.

公开(公告)号：US20220013411A1

公开(公告)日：2022-01-13

申请号：US16924686

申请日：2020-07-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Lun Chen ,  Li-Te Lin ,  Chao-Hsien Huang

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/10 ,  H01L21/3065 ,  H01L21/308

Abstract: The present disclosure relates to a method for forming a semiconductor structure includes depositing a dielectric layer on a substrate and depositing a patterning layer on the dielectric layer. The method also includes performing a first etching process on the patterning layer to form a first region including a first plurality of blocks at a first pattern density and a second region including a second plurality of blocks at a second pattern density that is lower than the first pattern density. The method also includes performing a second etching process on the second plurality of blocks to decrease a width of each block of the second plurality of blocks and etching the dielectric layer and the substrate using the first and second pluralities of blocks to form a plurality of fin structures.

公开(公告)号：US11201229B2

公开(公告)日：2021-12-14

申请号：US16657224

申请日：2019-10-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chansyun David Yang ,  Li-Te Lin

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/423

Abstract: A structure and a formation method of a semiconductor device are provided. The method includes forming a dummy gate stack over a semiconductor substrate and forming a spacer element over a sidewall of the dummy gate stack. The spacer element has an inner spacer and a dummy spacer, and the inner spacer is between the dummy spacer and the dummy gate stack. The method also includes forming a dielectric layer to surround the spacer element and the dummy gate stack and replacing the dummy gate stack with a metal gate stack. The method further includes removing the dummy spacer of the spacer element to form a recess between the inner spacer and the dielectric layer. In addition, the method includes forming a sealing element to seal the recess such that a sealed hole is formed between the metal gate stack and the dielectric layer.

公开(公告)号：US11183580B2

公开(公告)日：2021-11-23

申请号：US16676057

申请日：2019-11-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jung-Hao Chang ,  Li-Te Lin ,  Pinyen Lin

IPC: H01L29/66 ,  H01L21/8238 ,  H01L29/78 ,  H01L27/092 ,  H01L29/49 ,  H01L29/51

Abstract: A structure and a formation method of a semiconductor device are provided. The method includes forming a dummy gate stack over a semiconductor substrate and forming spacer elements over sidewalls of the dummy gate stack. The method also includes removing the dummy gate stack to form a recess between the spacer elements and forming a metal gate stack in the recess. The method further includes etching back the metal gate stack while the metal gate stack is kept at a temperature that is in a range from about 20 degrees C. to about 55 degrees C. In addition, the method includes forming a protection element over the metal gate stack after etching back the metal gate stack.

公开(公告)号：US11152491B2

公开(公告)日：2021-10-19

申请号：US16299531

申请日：2019-03-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Han-Yu Lin ,  Chansyun David Yang ,  Fang-Wei Lee ,  Tze-Chung Lin ,  Li-Te Lin ,  Pinyen Lin

IPC: H01L29/66 ,  H01L29/165 ,  H01L21/02 ,  H01L29/78 ,  H01L21/768 ,  H01L21/311 ,  H01L21/321 ,  H01L29/06

Abstract: A method for forming a semiconductor device structure is provided. The method for forming a semiconductor device structure includes forming a fin structure over a substrate. The fin structure includes first semiconductor layers and second semiconductor layers alternately stacked. The method for forming the semiconductor device structure also includes removing the first semiconductor layers of the fin structure in a channel region thereby exposing the second semiconductor layers of the fin structure. The method for forming the semiconductor device structure also includes forming a dielectric material surrounding the second semiconductor layers, and treating a first portion of the dielectric material. The method for forming the semiconductor device structure also includes etching the first portion of the dielectric material to form gaps, and filling the gaps with a gate stack.

公开(公告)号：US11107904B2

公开(公告)日：2021-08-31

申请号：US16592281

申请日：2019-10-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Han-Yu Lin ,  Chansyun David Yang ,  Tze-Chung Lin ,  Fang-Wei Lee ,  Fo-Ju Lin ,  Li-Te Lin ,  Pinyen Lin

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/311 ,  H01L29/06

Abstract: A method of fabricating a semiconductor device includes forming a structure including multiple nanowires vertically stacked above a substrate; depositing a dielectric material layer wrapping around the nanowires; performing a treatment process to a surface portion of the dielectric material layer; selectively etching the surface portion of the dielectric material layer; repeating the steps of performing the treatment process and selectively etching until the nanowires are partially exposed; and forming a gate structure engaging the nanowires.

公开(公告)号：US11081354B2

公开(公告)日：2021-08-03

申请号：US16725731

申请日：2019-12-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Yuan Tseng ,  Wei-Liang Lin ,  Li-Te Lin ,  Ru-Gun Liu ,  Min Cao

IPC: H01L21/033 ,  H01L21/308 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/417 ,  H01L29/66

Abstract: The present disclosure provides a method in accordance with some embodiments. The method includes forming a mandrel over a substrate, the mandrel having a first sidewall and a second sidewall opposing the first sidewall; forming a first fin on the first sidewall and a second fin on the second sidewall; depositing a dielectric material covering the first fin, the second fin, and the mandrel; partially removing the dielectric material, thereby exposing the second fin; etching the second fin without etching the first fin and the mandrel; removing the dielectric material; and removing the mandrel.

公开(公告)号：US20210202247A1

公开(公告)日：2021-07-01

申请号：US17201744

申请日：2021-03-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Ruei Jhan ,  Han-Yu Lin ,  Li-Te Lin ,  Pinyen Lin

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/40 ,  H01L21/3105 ,  H01L21/265

Abstract: A method includes forming a gate spacer on sidewalls of a dummy gate structure disposed over a semiconductor substrate; performing a first implantation process to the gate spacer, wherein the first implantation process includes bombarding an upper portion of the gate spacer with silicon atoms; after performing the first implantation process, performing a second implantation process to the upper portion of the gate spacer, where the second implantation process includes bombarding the upper portion of the gate spacer with carbon atoms; and after performing the second implantation process, replacing the dummy gate structure with a high-k metal gate structure, wherein the replacing includes forming an interlayer dielectric (ILD) layer.

公开(公告)号：US10777455B2

公开(公告)日：2020-09-15

申请号：US16260536

申请日：2019-01-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Jui Huang ,  Li-Te Lin ,  Pinyen Lin

IPC: H01L21/768 ,  H01L21/311 ,  H01L21/02 ,  H01L29/66

Abstract: A method for forming a semiconductor device structure is provided. A gate structure and a source/drain contact structure are formed over a substrate. The gate structure is covered with a capping layer. The capping layer and the source/drain contact structure are successively covered with a first insulating layer and a second insulating layer. A via opening is formed in the second insulating layer to expose the first insulating layer above the source/drain contact structure. The exposed first insulating layer is recessed using a first etching gas mixture including an oxygen gas, to leave a portion of the first insulating layer. The left portion of the first insulating layer using a second etching gas mixture including a hydrogen gas, to expose the source/drain contact structure. A conductive material is formed in the via opening to electrically connect the source/drain contact structure.