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    Methods of reducing gate spacer loss during semiconductor manufacturing
    2.
    发明授权
    Methods of reducing gate spacer loss during semiconductor manufacturing 有权

    公开(公告)号：US10950434B2

    公开(公告)日：2021-03-16

    申请号：US16259345

    申请日：2019-01-28

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Yi-Ruei Jhan ,  Han-Yu Lin ,  Li-Te Lin ,  Pinyen Lin

    IPC分类号： H01L21/02 ,  H01L29/66 ,  H01L29/40 ,  H01L21/3105 ,  H01L21/265

    摘要： A method includes forming a gate spacer on sidewalls of a dummy gate structure disposed over a semiconductor substrate; performing a first implantation process to the gate spacer, wherein the first implantation process includes bombarding an upper portion of the gate spacer with silicon atoms; after performing the first implantation process, performing a second implantation process to the upper portion of the gate spacer, wherein the second implantation process includes bombarding the upper portion of the gate spacer with carbon atoms; and after performing the second implantation process, replacing the dummy gate structure with a high-k metal gate structure, wherein the replacing includes forming an interlayer dielectric (ILD) layer.

    Semiconductor device structure and method for forming the same
    6.
    发明授权
    Semiconductor device structure and method for forming the same 有权

    公开(公告)号：US11417751B2

    公开(公告)日：2022-08-16

    申请号：US16837432

    申请日：2020-04-01

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Tze-Chung Lin ,  Han-Yu Lin ,  Li-Te Lin ,  Pinyen Lin

    IPC分类号： H01L29/66 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/423

    摘要： A method for forming a semiconductor device structure is provided. The method includes forming a plurality of first semiconductor layers and a plurality of second semiconductor layers on a substrate, and the first semiconductor layers and the second semiconductor layers are alternately stacked. The method also includes forming a dummy gate structure over the first semiconductor layers and the second semiconductor layers. The method further includes removing a portion of the first semiconductor layers and second semiconductor layers to form a trench, and removing the second semiconductor layers to form a recess between two adjacent first semiconductor layers. The method includes forming a dummy dielectric layer in the recess, and removing a portion of the dummy dielectric layer to form a cavity. The method also includes forming an inner spacer layer in the cavity.

    Inner Spacer Formation in Multi-Gate Transistors
    7.
    发明申请
    Inner Spacer Formation in Multi-Gate Transistors 有权

    公开(公告)号：US20210391447A1

    公开(公告)日：2021-12-16

    申请号：US17458087

    申请日：2021-08-26

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Han-Yu Lin ,  Chansyun David Yang ,  Tze-Chung Lin ,  Fang-Wei Lee ,  Fo-Ju Lin ,  Li-Te Lin ,  Pinyen Lin

    IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L21/311 ,  H01L29/06

    摘要： A method of fabricating a semiconductor device includes forming a channel member suspended above a substrate, depositing a dielectric material layer wrapping around the channel member, performing an oxidation treatment to a surface portion of the dielectric material layer, selectively etching the surface portion of the dielectric material layer to expose sidewalls of the channel member, performing a nitridation treatment to remaining portions of the dielectric material layer and the exposed sidewalls of the channel member, thereby forming a nitride passivation layer partially wrapping around the channel member. The method also includes repeating the steps of performing the oxidation treatment and selectively etching until top and bottom surfaces of the channel member are exposed, removing the nitride passivation layer from the channel member, and forming a gate structure wrapping around the channel member.

    Inner Spacer Formation in Multi-Gate Transistors
    9.
    发明申请
    Inner Spacer Formation in Multi-Gate Transistors 有权

    公开(公告)号：US20230118700A1

    公开(公告)日：2023-04-20

    申请号：US18066354

    申请日：2022-12-15

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Han-Yu Lin ,  Chansyun David Yang ,  Tze-Chung Lin ,  Fang-Wei Lee ,  Fo-Ju Lin ,  Li-Te Lin ,  Pinyen Lin

    IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L21/311 ,  H01L29/06

    摘要： A method for forming a semiconductor structure includes forming a fin on a semiconductor substrate. The fin includes channel layers and sacrificial layers stacked one on top of the other in an alternating fashion. The method also includes removing a portion of the fin to form a first opening and expose vertical sidewalls of the channel layers and the sacrificial layers, epitaxially growing a source/drain feature in the first opening from the exposed vertical sidewalls of the channel layers and the sacrificial layers, removing another portion of the fin to form a second opening to expose a vertical sidewall of the source/drain feature, depositing a dielectric layer in the second opening to cover the exposed vertical sidewall of the source/drain feature, and replacing the sacrificial layers with a metal gate structure in the second opening. The dielectric layer separates the source/drain feature from contacting the metal gate structure.