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公开(公告)号：US20140339652A1
公开(公告)日：2014-11-20
申请号：US14449157
申请日：2014-08-01
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Guang-Yaw Hwang , Chun-Hsien Lin , Hung-Ling Shih , Jiunn-Hsiung Liao , Zhi-Cheng Lee , Shao-Hua Hsu , Yi-Wen Chen , Cheng-Guo Chen , Jung-Tsung Tseng , Chien-Ting Lin , Tong-Jyun Huang , Jie-Ning Yang , Tsung-Lung Tsai , Po-Jui Liao , Chien-Ming Lai , Ying-Tsung Chen , Cheng-Yu Ma , Wen-Han Hung , Che-Hua Hsu
CPC classification number: H01L29/517 , H01L21/28088 , H01L21/823842 , H01L21/823857 , H01L29/4966 , H01L29/513 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/7833 , H01L29/7843 , H01L29/7845 , H01L29/7846
Abstract: A semiconductor device with oxygen-containing metal gates includes a substrate, a gate dielectric layer and a multi-layered stack structure. The multi-layered stack structure is disposed on the substrate. At least one layer of the multi-layered stack structure includes a work function metal layer. The concentration of oxygen in the side of one layer of the multi-layered stack structure closer to the gate dielectric layer is less than that in the side of one layer of the multi-layered stack structure opposite to the gate dielectric layer.
Abstract translation: 具有含氧金属栅极的半导体器件包括衬底，栅介质层和多层堆叠结构。 多层堆叠结构设置在基板上。 多层堆叠结构的至少一层包括功函数金属层。 更靠近栅介质层的多层堆叠结构的一层侧的氧的浓度小于与栅介质层相反的多层堆叠结构的一层的一侧的浓度。
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公开(公告)号：US20250141701A1
公开(公告)日：2025-05-01
申请号：US18518567
申请日：2023-11-23
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chang-Yih Chen , Kuo-Hsing Lee , Chun-Hsien Lin
Abstract: A method for fabricating a physically unclonable function (PUF) device includes the steps of first providing a PUF cell array having a plurality of unit cells, in which each of the unit cells includes a transistor and a first metal-oxide semiconductor capacitor (MOSCAP) and a second MOSCAP coupled to the transistor. Next, a voltage is transmitted through the transistor to the first MOSCAP and the second MOSCAP and whether the first MOSCAP or the second MOSCAP reaches a breakdown is determined.
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公开(公告)号：US20250063803A1
公开(公告)日：2025-02-20
申请号：US18368552
申请日：2023-09-14
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chang-Yih Chen , Kuo-Hsing Lee , Chun-Hsien Lin , Kun-Szu Tseng , Sheng-Yuan Hsueh , Yao-Jhan Wang
IPC: H01L21/8234 , H01L27/06
Abstract: A method for fabricating a semiconductor device includes the steps of first providing a substrate having a non-metal-oxide semiconductor capacitor (non-MOSCAP) region and a MOSCAP region, forming a first fin-shaped structure on the MOSCAP region, performing a monolayer doping (MLD) process on the first fin-shaped structure, and then performing an anneal process for driving dopants into the first fin-shaped structure. Preferably, the MLD process is further accomplished by first performing a wet chemical doping process on the first fin-shaped structure and then forming a cap layer on the non-MOSCAP region and the MOSCAP region.
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公开(公告)号：US20250056818A1
公开(公告)日：2025-02-13
申请号：US18367467
申请日：2023-09-13
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chang-Yih Chen , Kuo-Hsing Lee , Chun-Hsien Lin
Abstract: A semiconductor device includes a bottom portion, a middle portion, a top portion, and a base portion between the bottom portion and the substrate. Preferably, the bottom portion is surrounded by a shallow trench isolation (STI), a gate oxide layer is disposed on the fin-shaped structure and the STI, a bottom surface of the gate oxide layer is higher than a top surface of the base portion, a width of a top surface of the bottom portion is greater than half the width of the bottom surface of the bottom portion, and a tip of the top portion includes a tapered portion.
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公开(公告)号：US20250014948A1
公开(公告)日：2025-01-09
申请号：US18885734
申请日：2024-09-15
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Fu-Jung Chuang , Po-Jen Chuang , Yu-Ren Wang , Chi-Mao Hsu , Chia-Ming Kuo , Guan-Wei Huang , Chun-Hsien Lin
IPC: H01L21/8238 , H01L21/762 , H01L27/092
Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the first fin-shaped structure into a first portion and a second portion, and more than two gate structures on the SDB structure. Preferably, the more than two gate structures include a first gate structure, a second gate structure, a third gate structure, and a fourth gate structure disposed on the SDB structure.
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Patent Agency Ranking
公开(公告)号：US12191391B2
公开(公告)日：2025-01-07
申请号：US18244892
申请日：2023-09-11
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Shou-Wan Huang , Chun-Hsien Lin
IPC: H01L29/78 , H01L27/06 , H01L27/088 , H01L29/06 , H01L29/66
Abstract: A semiconductor device includes a substrate having a first region and a second region, a first fin-shaped structure extending along a first direction on the first region, a double diffusion break (DDB) structure extending along a second direction to divide the first fin-shaped structure into a first portion and a second portion, and a first gate structure and a second gate structure extending along the second direction on the DDB structure.
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公开(公告)号：US20240397833A1
公开(公告)日：2024-11-28
申请号：US18791412
申请日：2024-07-31
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hui-Lin Wang , Chun-Hsien Lin
Abstract: A semiconductor device for internet of things (IoT) device includes a substrate having an array region defined thereon and a ring of dummy pattern surrounding the array region. Preferably, the ring of dummy pattern includes a plurality of magnetic tunneling junctions (MTJs) and a ring of metal interconnect pattern overlapping the MTJs and surrounding the array region. The semiconductor device further includes a gap between the array region and the ring of dummy pattern.
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公开(公告)号：US12089507B2
公开(公告)日：2024-09-10
申请号：US18118669
申请日：2023-03-07
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hui-Lin Wang , Chun-Hsien Lin
Abstract: A semiconductor device for internet of things (IoT) device includes a substrate having an array region defined thereon and a ring of dummy pattern surrounding the array region. Preferably, the ring of dummy pattern includes a plurality of magnetic tunneling junctions (MTJs) and a ring of metal interconnect pattern overlapping the MTJs and surrounding the array region. The semiconductor device further includes a gap between the array region and the ring of dummy pattern.
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公开(公告)号：US12027600B2
公开(公告)日：2024-07-02
申请号：US18201769
申请日：2023-05-25
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Po-Kuang Hsieh , Shih-Hung Tsai , Ching-Wen Hung , Chun-Hsien Lin
IPC: H01L29/423 , H01L29/06 , H01L29/16 , H01L29/45 , H01L29/66 , H01L29/786
CPC classification number: H01L29/42392 , H01L29/0673 , H01L29/1606 , H01L29/45 , H01L29/66045 , H01L29/78696
Abstract: A method for fabricating a nanowire transistor includes the steps of first forming a nanowire channel structure on a substrate, in which the nanowire channel structure includes first semiconductor layers and second semiconductor layers alternately disposed over one another. Next, a gate structure is formed on the nanowire channel structure and then a source/drain structure is formed adjacent to the gate structure, in which the source/drain structure is made of graphene.
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公开(公告)号：US20230420564A1
公开(公告)日：2023-12-28
申请号：US18244892
申请日：2023-09-11
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Shou-Wan Huang , Chun-Hsien Lin
IPC: H01L29/78 , H01L27/088 , H01L27/06 , H01L29/06 , H01L29/66
CPC classification number: H01L29/785 , H01L27/0886 , H01L27/0688 , H01L29/0649 , H01L29/66795
Abstract: A semiconductor device includes a substrate having a first region and a second region, a first fin-shaped structure extending along a first direction on the first region, a double diffusion break (DDB) structure extending along a second direction to divide the first fin-shaped structure into a first portion and a second portion, and a first gate structure and a second gate structure extending along the second direction on the DDB structure.
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