-
公开(公告)号：US10818298B2
公开(公告)日：2020-10-27
申请号：US16188642
申请日：2018-11-13
Inventor： John Paul Lesso , Gordon Richard McLeod
Abstract: A method of audio processing comprises receiving an audio signal. A plurality of framed versions of the received audio signal are formed, each of the framed versions having a respective frame start position. One of the plurality of framed versions of the received audio signal is selected. The selected one of the plurality of framed versions of the received audio signal is used in a subsequent process.
-
公开(公告)号：US10771047B2
公开(公告)日：2020-09-08
申请号：US16504534
申请日：2019-07-08
Inventor： John Paul Lesso
Abstract: This application relates to time-encoding modulators (TEMs). A TEM (100) receives an input signal (SIN) and outputs a time encoded signal (SPWM). A comparator (101) is located within a forward signal path of a feedback loop of the TEM. Also in the feedback loop are a filter (104) and a delay element (106) for applying a controlled delay. In some embodiments a latching element (101, 302; 106, 402) is located within the forward signal path to synchronise any signal transitions output from the latching element to a received first clock signal. Any signal transitions in the output (SOUT) from the modulator are thus synchronised to the first clock signal. In some embodiments the delay element (106) is a digital delay element which is synchronised to the first clock signal.
-
公开(公告)号：US10714109B2
公开(公告)日：2020-07-14
申请号：US15938809
申请日：2018-03-28
Inventor： John Paul Lesso
IPC: G10L19/16 , G10L19/002 , G10L19/24 , H03M7/30 , G10L19/22
Abstract: One aspect of the disclosure provides a device, comprising: an allocation module, for determining one or more metrics of each of a plurality of data streams; a compression module, for compressing each of the plurality of data streams and generating a plurality of compressed data streams, the compression module applying a compression ratio that varies as a function of the metrics determined by the allocation module; and a buffer memory, for storing the plurality of compressed data streams.
-
公开(公告)号：US10700648B2
公开(公告)日：2020-06-30
申请号：US15993990
申请日：2018-05-31
Inventor： John Paul Lesso
IPC: H03F3/68 , H03F1/34 , H03F3/187 , H03F1/32 , H03F3/181 , H03F1/02 , H03F1/26 , H03F3/217 , H03G3/30 , H04R3/00
Abstract: This application relates to audio driving circuits having good audio performance. The circuit (301) has a forward signal path between an input (103) for receiving an input audio signal (SIN) and an output (104) for outputting an output signal (SOUT) with an amplifier module (102) in the forward signal path. An error block (302) is arranged to receive a first signal (SFF) derived from the input signal and also a second signal (SFB) derived from the output signal and determine a first error signal (ε1) indicative of a difference between the first and second signals. A first processing module (204) is operable to generate a compensation signal (SC) to be applied to the input signal (SIN) upstream of the amplifier module (102) based on the first error signal. The error block (302) comprises a second processing module (303/303a) configured to apply a linear transfer function to one of the first signal or the second signals prior to determining the first error signal. In some embodiments the second processing module may apply a linear transfer function which is adaptive based on a second error signal (ε2) indicative of the error between the first and second signals after the linear transfer function has been applied.
-
公开(公告)号：US10461714B2
公开(公告)日：2019-10-29
申请号：US15886103
申请日：2018-02-01
Inventor： John Paul Lesso , Toru Ido
Abstract: This application relates to Class D amplifier circuits (200). A modulator (201) controls a Class D output stage (202) based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block (205), which may comprise an ADC (207), generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input (204) of a signal selector block (203). The input signal may be received at a second input (206) of the signal selector block (203). The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block (205).
-
Patent Agency Ranking
公开(公告)号：US10368178B2
公开(公告)日：2019-07-30
申请号：US15935489
申请日：2018-03-26
Inventor： John Paul Lesso , Emmanuel Philippe Christian Hardy
Abstract: This application relates to an apparatus (300) for monitoring an operating temperature condition of a microphone device (100) having an acoustic port (110). The apparatus includes a spectrum peak detect block (301) for receiving a microphone signal (SMIC) and determining, from the microphone signal, a resonance frequency (fH) and a quality factor (QH) of a resonance (202) associated with the acoustic port of the microphone. A condition monitoring block (302) is configured to determine any change in resonance frequency and quality factor with respect to respective reference values of resonance frequency and quality factor and to determine a temperature condition for the air temperature within the acoustic port based on said determined changes.
-
公开(公告)号：US10348282B1
公开(公告)日：2019-07-09
申请号：US16050762
申请日：2018-07-31
Inventor： John Paul Lesso
Abstract: This application relates to time-encoding modulators (TEMs). A TEM (100) receives an input signal (SIN) and outputs a time encoded signal (SPWM). A comparator (101) is located within a forward signal path of a feedback loop of the TEM. Also in the feedback loop are a filter (104) and a delay element (106) for applying a controlled delay. In some embodiments a latching element (101, 302; 106, 402) is located within the forward signal path to synchronize any signal transitions output from the latching element to a received first clock signal. Any signal transitions in the output (SOUT) from the modulator are thus synchronized to the first clock signal. In some embodiments the delay element (106) is a digital delay element which is synchronized to the first clock signal.
-
公开(公告)号：US10313792B2
公开(公告)日：2019-06-04
申请号：US15439480
申请日：2017-02-22
Inventor： John Paul Lesso , John Laurence Melanson
Abstract: This application relates to methods and apparatus for digital microphones. Disclosed is a digital microphone apparatus (300) for outputting a digital output signal (DATA) at a sample rate defined by a received clock signal (CLK). The apparatus includes a band splitter (302) configured to receive a microphone signal (SMD) indicative of an output of a microphone transducer and split said microphone signal into first signal path (SP1) for frequencies in a first band and a second signal path (SP2) for frequencies in a second band, the frequencies of the second band being higher than the frequencies in the first band. A modulation block (304) is configured to operate on the second signal path to apply a selective gain modulation to signals in the second signal path.
-
公开(公告)号：US10256837B2
公开(公告)日：2019-04-09
申请号：US16105746
申请日：2018-08-20
Inventor： John Paul Lesso
IPC: H03M3/00 , H03K21/38 , H03K3/0233
Abstract: This application relates to time-encoding modulators (301,700) having a self-oscillating modulator module configured to receive an input signal and output a pulse-width modulated signal (SPWM) where the pulse-width modulated signal is synchronized to a first clock signal (CLK1). A hysteretic comparator module (302) located in a feedforward path is configured to generate the time encoded signal (SPWM) at a first node (304) based on the input signal (SIN) and a feedback signal (SFB). A feedback path is coupled to the first node to provide the feedback signal, which is either applied to an input of the hysteretic comparator module via a loop filter (701) in the feedback path or applied to the feedforward path prior to a loop filter (202) upstream of the hysteretic comparator module (302). The hysteretic comparator module (302) is configured such that any change in state of the time encoded signal at the first node is synchronized to the first clock signal (CLK1).
-
公开(公告)号：US10177718B2
公开(公告)日：2019-01-08
申请号：US15858173
申请日：2017-12-29
Inventor： John Paul Lesso , Emmanuel Philippe Christian Hardy
Abstract: This application relates to audio amplifier circuitry (100). An amplifier module (103) is located in a signal path between an input (101) and an output (102). A detection module (106) is configured to detect a characteristic of a load (104) electrically coupled, in use, to the output. A distortion setting controller (107) is provided for selecting one of a plurality of stored distortion settings {pi} based on the detected characteristic of the load; and a pre-distortion module (105) is configured to apply a first transfer function to a signal in the signal path prior to said amplifier module. The first transfer function is based on the selected distortion setting and for at least one of the stored distortion settings the corresponding first transfer function comprises a non-linear distortion function.
-
-
-
-
-
-
-
-
-
Search Results
164
records
(took 0.031 seconds)
