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111.发明申请公开(公告)号：US20180034478A1
公开(公告)日：2018-02-01
申请号：US15553458
申请日：2016-02-23
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM
CPC classification number: H03M13/1148 , G06T7/162 , H03M13/1102 , H03M13/1105 , H03M13/1111 , H03M13/1165 , H03M13/152 , H03M13/255 , H03M13/27 , H03M13/2778 , H03M13/2906 , H03M13/618 , H03M13/6362 , H04W72/0466
Abstract: A zero padding apparatus and method for fixed length signaling information are disclosed. A zero padding apparatus according to an embodiment of the present invention includes a processor configured to generate a LDPC information bit string by deciding a number of groups whose all bits are to be filled with 0 using a difference between a length of the LDPC information bit string and a length of a BCH-encoded bit string, selecting the groups using a shortening pattern order to fill all the bits of the groups with 0, and filling at least a part of remaining groups, which are not filled with 0, with the BCH-encoded bit string; and memory configured to provide the LDPC information bit string to an LDPC encoder.
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公开(公告)号：US20180019764A1
公开(公告)日：2018-01-18
申请号：US15703822
申请日：2017-09-13
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Bo-Mi LIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2767 , H03M13/1165 , H03M13/255 , H03M13/2778 , H03M13/2792 , H04L1/0057 , H04L1/0071 , H04L2001/0093
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
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113.发明申请公开(公告)号：US20170279550A1
公开(公告)日：2017-09-28
申请号：US15461231
申请日：2017-03-16
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H04H20/42 , H04H20/426 , H04H60/07 , H04H60/73 , H04L1/0041 , H04L1/0045 , H04L1/0057 , H04L1/007 , H04L1/0071 , H04L1/0075 , H04L27/2601 , H04L27/2615 , Y02D70/00 , Y02D70/166 , Y02D70/168
Abstract: An apparatus and method for generating a broadcast signal frame using enhanced layer dummy values are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling time interleaver information corresponding to the time interleaver, the time interleaver uses one of time interleaver groups, and enhanced layer data corresponding to the one of the time interleaver groups include dummy values.
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114.发明申请公开(公告)号：US20170272692A1
公开(公告)日：2017-09-21
申请号：US15532061
申请日：2016-03-08
Inventor： Jae-Young LEE , Sung-Ik PARK , Sun-Hyoung KWON , Heung-Mook KIM
IPC: H04N7/081 , H04N19/187 , H04N5/445 , H04N21/236 , H04N3/28 , H04L27/26 , H04N21/2343
CPC classification number: H04N7/081 , H04H20/42 , H04L1/00 , H04L1/0041 , H04L1/0045 , H04L1/0057 , H04L1/0065 , H04L1/007 , H04L1/0071 , H04L27/26 , H04L27/2601 , H04N3/28 , H04N5/445 , H04N19/187 , H04N21/2343 , H04N21/234327 , H04N21/236 , H04N21/2383
Abstract: An apparatus and method for broadcast signal frame using layered division multiplexing are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling, size information of Physical Layer Pipes (PLPs) and time interleaver information shared by the core layer signal and the enhanced layer signal.
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115.发明申请公开(公告)号：US20170201336A1
公开(公告)日：2017-07-13
申请号：US15323944
申请日：2015-07-03
Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE , R&DB FOUNDATION, KOREA MARITIME AND OCEAN UNIVERSITY
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jeong-Chang KIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H04H20/423 , H04H20/42 , H04J11/004 , H04L1/0071 , H04L27/26 , H04L27/2613 , H04L27/3488 , H04L69/323 , Y02D70/00 , Y02D70/168
Abstract: A broadcast signal transmission apparatus and method using layered division multiplexing are disclosed. A broadcast signal transmission apparatus according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; a frame builder configured to generate a broadcast signal frame using the time-interleaved signal; and an orthogonal frequency division multiplexing (OFDM) transmitter configured to generate a pilot signal that is shared by a core layer corresponding to the core layer signal and an enhanced layer corresponding to the enhanced layer signal.
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Patent Agency Ranking
公开(公告)号：US20170126250A1
公开(公告)日：2017-05-04
申请号：US15374609
申请日：2016-12-09
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , G06F11/1076 , H03M13/1102 , H03M13/1151 , H03M13/1165 , H03M13/255 , H03M13/2739 , H03M13/2778 , H03M13/6552
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
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117.发明申请公开(公告)号：US20170085339A1
公开(公告)日：2017-03-23
申请号：US15368287
申请日：2016-12-02
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H04L1/0041 , H03M13/1102 , H03M13/1148 , H03M13/116 , H03M13/1185 , H03M13/255 , H03M13/2778 , H03M13/2792 , H03M13/616 , H03M13/6552 , H04L1/0058
Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 2/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
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118.发明申请MODULATOR AND MODULATION METHOD USING NON-UNIFORM 16-SYMBOL SIGNAL CONSTELLATION FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING 3/15 CODE RATE 审中-公开使用非均匀16符号信号的调制解调器和调制方法用于低密度奇偶校验检查具有3/15代码率的编码公开(公告)号：US20170054452A1
公开(公告)日：2017-02-23
申请号：US15346646
申请日：2016-11-08
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/1165 , H03M13/255 , H03M13/2792 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0042 , H04L1/0057 , H04L1/0058 , H04L1/0071 , H04L27/3422
Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 3/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
Abstract translation: 公开了一种使用非均匀16符号信号星座的调制器和调制方法。 调制器包括存储器和处理器。 存储器接收与码率为3/15的低密度奇偶校验（LDPC）码对应的码字。 处理器将码字映射为4比特的16位符号的不均匀16符号信号星座。
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119.发明申请SIGNAL MULTIPLEXING APPARATUS USING LAYERED DIVISION MULTIPLEXING AND SIGNAL MULTIPLEXING METHOD 审中-公开使用分层多路复用和信号多路复用方法的信号多路复用器公开(公告)号：US20170026223A1
公开(公告)日：2017-01-26
申请号：US15124646
申请日：2015-02-25
Inventor： Sung-Ik PARK , Jae-Young LEE , Sun-Hyoung KWON , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H04L1/0071 , H03M13/27 , H04J11/004 , H04L1/00 , H04L27/3488 , H04W52/346
Abstract: An apparatus and method for multiplexing signals using layered division multiplexing are disclosed. A signal multiplexing apparatus according to an embodiment of the present invention includes a combiner configured to combine a core layer signal and an enhanced layer signal at different power levels to generate a multiplexed signal, a power normalizer configured to reduce power of the multiplexed signal to power corresponding to the core layer signal, and a time interleaver configured to perform interleaving applied to both the core layer signal and the enhanced layer signal.
Abstract translation: 公开了一种使用分层复用复用信号的装置和方法。 根据本发明实施例的信号多路复用装置包括组合器，其被配置为组合核心层信号和不同功率电平的增强层信号以产生多路复用信号;功率归一化器，被配置为将多路复用信号的功率降低到功率 对应于核心层信号，以及时间交织器，被配置为执行应用于核心层信号和增强层信号两者的交织。
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120.发明申请BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 3/15 AND 256-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME 有权用于低密度奇偶校验的位交换机检查长度为16200，编码速率为3/15和256符号映射，以及使用相同的位交互方法公开(公告)号：US20160241272A1
公开(公告)日：2016-08-18
申请号：US14719598
申请日：2015-05-22
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Bo-Mi LIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/1165 , H03M13/255 , H03M13/2778
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
Abstract translation: 本文公开了一种位交织器，位交织编码调制（BICM）装置和比特交织方法。 比特交织器包括第一存储器，处理器和第二存储器。 第一存储器存储长度为16200且码率为3/15的低密度奇偶校验（LDPC）码字。 处理器通过基于比特组交织LDPC码字来产生交错码字。 位组的大小对应于LDPC码字的并行因子。 第二存储器将交织的码字提供给用于256符号映射的调制器。
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