公开(公告)号：US20190384837A1

公开(公告)日：2019-12-19

申请号：US16012515

申请日：2018-06-19

Applicant: Intel Corporation

Inventor： Karthik KUMAR ,  Francesc GUIM BERNAT ,  Thomas WILLHALM ,  Mark A. SCHMISSEUR ,  Benjamin GRANIELLO

IPC: G06F17/30 ,  G06F11/14 ,  G06F12/0804 ,  G06F12/02

Abstract: A group of cache lines in cache may be identified as cache lines not to be flushed to persistent memory until all cache line writes for the group of cache lines have been completed.

公开(公告)号：US20190251034A1

公开(公告)日：2019-08-15

申请号：US16396576

申请日：2019-04-26

Applicant: Intel Corporation

Inventor： Francesc GUIM BERNAT ,  Dimitrios ZIAKAS ,  Mark A. SCHMISSEUR ,  Kshitij A. DOSHI ,  Kimberly A. MALONE

IPC: G06F12/0888 ,  G06F12/1027 ,  G06F12/06 ,  G06N3/04 ,  G06F9/50

CPC classification number: G06F12/0888 ,  G06F9/5016 ,  G06F9/5061 ,  G06F12/0607 ,  G06F12/1027 ,  G06N3/04

Abstract: A semiconductor chip is described. The semiconductor chip includes memory address decoder logic circuitry comprising different memory address bit manipulation paths to respectively impose different memory interleaving schemes for memory accesses directed to artificial intelligence information in a memory and non artificial intelligence information in the memory. The artificial intelligence information is to be processed with artificial intelligence logic circuitry disposed locally to the memory.

公开(公告)号：US20190104029A1

公开(公告)日：2019-04-04

申请号：US15721460

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Francesc GUIM BERNAT

IPC: H04L12/24

Abstract: Examples include techniques to establish service level agreements (SLAs or quality of service (QoS) for remote accessible storage devices. Examples include setting up SLA/QoS for an end-to-end path between a client computing node hosting an application and one or more remotely accessible storage devices coupled with a target host computing node. The client computing node and the target host computing node coupled through a networking fabric.

公开(公告)号：US20190102299A1

公开(公告)日：2019-04-04

申请号：US15724311

申请日：2017-10-04

Applicant: Intel Corporation

Inventor： Francesc GUIM BERNAT ,  Kshitij DOSHI ,  Sujoy SEN

IPC: G06F12/0813 ,  G06F3/06 ,  G06F9/50 ,  G06F12/0868

Abstract: A method and apparatus for performing a data transfer, which include a selection a data transfer operation mode, based on telemetry data, from a first operation mode where a first type of data is transferred from a memory of a computing system to one or more shared storage devices, and a second operation mode where a second type of data is transferred from the memory to the one or more shared storage devices, the first type of data being associated with a first range of address space of the one or more shared storage devices, the second type of data being associated with a second range of address space of the one or more shared storage devices different from the first range of address space. Furthermore, a data transfer from the memory to the one or more shared storage devices in the selected data transfer operation mode may be included.

公开(公告)号：US20190101880A1

公开(公告)日：2019-04-04

申请号：US15721400

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Francesc GUIM BERNAT

IPC: G05B19/045 ,  G06F12/06 ,  G11C11/408 ,  G06F12/0813

Abstract: Examples include techniques to direct access requests to storage or memory devices. Examples include receiving an access request to remotely access storage devices. The access request included in a fabric packet routed to a target host computing node coupled with the storage devices through a networking fabric. The access request directed to shared or dedicated storage devices based on whether the access request is characterized or define as a sequential stream or a random stream.

公开(公告)号：US20190045022A1

公开(公告)日：2019-02-07

申请号：US15940958

申请日：2018-03-29

Applicant: Intel Corporation

Inventor： Francesc GUIM BERNAT ,  Eoin WALSH ,  Paul MANNION ,  Timothy VERRALL ,  Mark A. SCHMISSEUR

IPC: H04L29/08 ,  H04L29/06

Abstract: An apparatus is described. The apparatus includes switch circuitry to route packets that are destined for one or more cloud storage services instead to local caching resources. The packets are sent from different tenants of the one or more cloud storage services and have respective payloads that contain read/write commands for one or more cloud storage services. The apparatus includes storage controller circuitry to be coupled to non volatile memory. The non volatile memory is to implement the local caching resources. The storage controller is to implement customized caching treatment for the different tenants. The apparatus includes network interface circuitry coupled between the switch circuitry and the storage controller circuitry to implement customized network end point processing for the different tenants.

公开(公告)号：US20180004687A1

公开(公告)日：2018-01-04

申请号：US15201373

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： Francesc GUIM BERNAT ,  Karthik KUMAR ,  Thomas WILLHALM ,  Narayan RANGANATHAN ,  Pete D. VOGT

IPC: G06F13/16 ,  G06F13/42 ,  G06F13/40 ,  H04L29/08 ,  H04L12/803

Abstract: An extension of node architecture and proxy requests enables a node to expose memory computation capability to remote nodes. A remote node can request execution of an operation by a remote memory computation resource, and the remote memory computation resource can execute the request locally and return the results of the computation. The node includes processing resources, a fabric interface, and a memory subsystem including a memory computation resource. The local execution of the request by the memory computation resource can reduce latency and bandwidth concerns typical with remote requests.