公开(公告)号：US20070227238A1

公开(公告)日：2007-10-04

申请号：US11629464

申请日：2005-06-14

申请人： Takeshi Takagi ,  Minoru Koyama ,  Mitsuyoshi Nakatani

发明人： Takeshi Takagi ,  Minoru Koyama ,  Mitsuyoshi Nakatani

IPC分类号： G01M15/02

CPC分类号： F16D3/2245 ,  F16D3/223 ,  F16D2250/00 ,  G01B5/02

摘要： A method and a device for measuring the dimensions of a constant velocity joint. In the method, for example, the cylindrical part of an outer member with a specified offset value is supported on the support part of a dimension measuring device for the outer member. On the other hand, a holding bar is inserted into a recessed part formed in the shaft part of the outer member. In this case, balls installed at the tip of the support part are inserted into the ball grooves of the cylindrical part. In this state, a rotating member is rotated to bring a probe into contact with the inside wall of the cylindrical part. The measurement core of a micro gauge is displaced according to the displacement of the probe, and the amount of the displacement thereof is displayed as the amount of the variation of the needle of the micro gauge.

摘要翻译： 一种用于测量等速万向节尺寸的方法和装置。 在该方法中，例如，具有特定偏移值的外部构件的圆筒部被支撑在用于外部构件的尺寸测量装置的支撑部上。 另一方面，将保持杆插入形成在外部构件的轴部中的凹部中。 在这种情况下，安装在支撑部分的尖端处的球被插入圆柱形部分的球槽中。 在这种状态下，旋转构件被旋转以使探针与圆筒形部分的内壁接触。 微量计的测量芯根据探针的位移而移位，其位移量显示为微量计针的变化量。

公开(公告)号：US07205586B2

公开(公告)日：2007-04-17

申请号：US10851073

申请日：2004-05-24

申请人： Takeshi Takagi ,  Akira Inoue

发明人： Takeshi Takagi ,  Akira Inoue

IPC分类号： H01L31/072

CPC分类号： H01L29/1054 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/161 ,  H01L29/165 ,  H01L29/7782 ,  H01L29/783 ,  H01L29/78615 ,  H01L29/78648 ,  H01L29/78687

摘要： A HDTMOS includes a Si substrate, a buried oxide film and a semiconductor layer. The semiconductor layer includes an upper Si film, an epitaxially grown Si buffer layer, an epitaxially grown SiGe film, and an epitaxially grown Si film. Furthermore, the HDTMOS includes an n-type high concentration Si body region, an n− Si region, a SiGe channel region containing n-type low concentration impurities, an n-type low concentration Si cap layer, and a contact which is a conductor member for electrically connecting the gate electrode and the Si body region. The present invention extends the operation range while keeping the threshold voltage small by using, for the channel layer, a material having a smaller potential at the band edge where carriers travel than that of a material constituting the body region.

摘要翻译： HDTMOS包括Si衬底，掩埋氧化物膜和半导体层。 半导体层包括上硅膜，外延生长的Si缓冲层，外延生长的SiGe膜和外延生长的Si膜。 此外，HDTMOS包括n型高浓度Si体区域，n + Si区域，含有n型低浓度杂质的SiGe沟道区域，n型低浓度Si覆盖层， 以及作为用于电连接栅电极和Si体区的导体构件的接触。 本发明通过在沟道层使用载流子行进的带边缘处的电位较小的材料，而不是构成体区的材料的情况下，使阈值电压保持较小。

公开(公告)号：US07135721B2

公开(公告)日：2006-11-14

申请号：US10872477

申请日：2004-06-22

申请人： Kenji Toyoda ,  Koichiro Yuki ,  Takeshi Takagi ,  Teruhito Ohnishi ,  Minoru Kubo

发明人： Kenji Toyoda ,  Koichiro Yuki ,  Takeshi Takagi ,  Teruhito Ohnishi ,  Minoru Kubo

IPC分类号： H01L29/739 ,  H01L31/072 ,  H01L31/109 ,  H01L31/0328 ,  H01L31/0336

CPC分类号： H01L29/7378

摘要： The bipolar transistor of the present invention includes a Si collector buried layer, a first base region made of a SiGeC layer having a high C content, a second base region made of a SiGeC layer having a low C content or a SiGe layer, and a Si cap layer 14 including an emitter region. The C content is less than 0.8% in at least the emitter-side boundary portion of the second base region. This suppresses formation of recombination centers due to a high C content in a depletion layer at the emitter-base junction, and improves electric characteristics such as the gain thanks to reduction in recombination current, while low-voltage driving is maintained.

摘要翻译： 本发明的双极晶体管包括Si集电极掩埋层，由具有高C含量的SiGeC层制成的第一基极区域，具有低C含量的SiGeC层或SiGe层制成的第二基极区域，以及 Si覆盖层14包括发射极区域。 至少在第二基极区域的发射极边界部分中，C含量小于0.8％。 这抑制了由于在发射极 - 基极结处的耗尽层中的高C含量而导致的复合中心的形成，并且由于复合电流的降低而改善了诸如增益的电特性，同时维持了低电压驱动。

公开(公告)号：US20060145245A1

公开(公告)日：2006-07-06

申请号：US10544486

申请日：2004-02-09

申请人： Yoshihiro Hara ,  Takeshi Takagi

发明人： Yoshihiro Hara ,  Takeshi Takagi

IPC分类号： H01L29/76

CPC分类号： H01L29/783 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823828 ,  H01L27/092

摘要： A field effect transistor comprises: a semiconductor substrate; a semiconductor layer provided on the semiconductor substrate, the semiconductor layer including a body region which contains an impurity of a first conductivity type; a gate dielectric film provided on the semiconductor layer; a gate electrode provided on the gate dielectric film; and a source region and a drain region provided in the semiconductor layer at positions below the sides of the gate electrode, the source region and the drain region containing an impurity of a second conductivity type. The gate electrode and the body region are electrically short-circuited. In the semiconductor layer except for the source region and the drain region, at least part of a junction portion bordering on the source region or the drain region contains the impurity of the first conductivity type with a higher concentration than in the body region except for junction portions bordering on the source region and the drain region.

摘要翻译： 场效应晶体管包括：半导体衬底; 设置在所述半导体衬底上的半导体层，所述半导体层包括含有第一导电类型杂质的体区; 设置在半导体层上的栅介质膜; 设置在栅极电介质膜上的栅电极; 以及源极区域和漏极区域，设置在半导体层中位于栅电极的侧面下方的位置处，源极区域和漏极区域包含第二导电类型的杂质。 栅电极和体区电气短路。 在除了源极区域和漏极区域之外的半导体层中，与源极区域或漏极区域接合的至少一部分接合部分含有比除了接合部分以外的体区域中的浓度高的第一导电型杂质 在源极区域和漏极区域上接合的部分。

公开(公告)号：US20060125025A1

公开(公告)日：2006-06-15

申请号：US11344574

申请日：2006-02-01

申请人： Takahiro Kawashima ,  Tohru Saitoh ,  Takeshi Takagi

发明人： Takahiro Kawashima ,  Tohru Saitoh ,  Takeshi Takagi

IPC分类号： H01L29/76

CPC分类号： H01L29/78696 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/1606 ,  H01L29/42384 ,  H01L29/7781 ,  H01L29/78642 ,  Y10S977/938

摘要： A vertical field effect transistor includes: an active region with a bundle of linear structures functioning as a channel region where electric carriers are transported; a lower electrode, connected to the bottom of the active region and functioning as one of source and drain regions; an upper electrode, connected to the top of the active region and functioning as the other of the source and drain regions; a gate electrode for controlling the electric conductivity of at least a portion of the bundle of linear structures included in the active region; and a gate insulating film arranged between the active region and the gate electrode to electrically isolate the gate electrode from the bundle of linear structures. The transistor further includes a dielectric portion between the upper and lower electrodes. The upper electrode is located over the lower electrode with the dielectric portion interposed and includes an overhanging portion that sticks out laterally from over the dielectric portion. The active region is located right under the overhanging portion of the upper electrode.

摘要翻译： 垂直场效应晶体管包括：有源区，其具有用作传输电载体的沟道区的线性结构束; 下电极，连接到有源区的底部并用作源极和漏极区之一; 上电极，连接到有源区的顶部并用作源极和漏极区域中的另一个; 用于控制所述有源区域中包括的所述线性结构束的至少一部分的电导率的栅电极; 以及栅极绝缘膜，其布置在所述有源区和所述栅电极之间，以将所述栅电极与所述线结构的束电隔离。 晶体管还包括在上电极和下电极之间的电介质部分。 上电极位于下电极的上方，电介质部分插入，并且包括从电介质部分的上方向外伸出的突出部分。 有源区域位于上电极的伸出部分正下方。

公开(公告)号：US06984844B2

公开(公告)日：2006-01-10

申请号：US10657799

申请日：2003-09-09

申请人： Takeshi Takagi

发明人： Takeshi Takagi

IPC分类号： H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC分类号： H01L27/1203 ,  H01L21/823807 ,  H01L21/84 ,  H01L29/7782 ,  H01L29/802

摘要： A semiconductor device according to the invention includes: a semiconductor layer (10–15); a gate insulator (16) provided on the semiconductor layer; a gate electrode (17) provided on the gate insulator; a source region (20a) and a drain region (20b), which are of a first conductivity type and are provided in the semiconductor layer on both sides of the gate electrode in plan view; a cap layer (25), a channel region (24), and an under-channel region (23,22), which are of a second conductivity type and are provided in the semiconductor layer between the source region and the drain region in a descending order from an interface with the gate insulator; and a bias electrode member (Vbs) for applying a voltage to the under-channel region, wherein the channel region is formed of a first semiconductor, the cap layer and the under-channel region are formed of a second semiconductor and a third semiconductor, respectively, each of which has a larger band gap than the first semiconductor, the bias electrode member is capable of applying the voltage independently of the gate electrode.

摘要翻译： 根据本发明的半导体器件包括：半导体层（10-15）; 设置在所述半导体层上的栅极绝缘体（16） 设置在栅极绝缘体上的栅电极（17） 源极区域（20a）和漏极区域（20b），它们是第一导电类型，并且在平面图中设置在栅电极两侧的半导体层中; 具有第二导电类型的盖层（25），沟道区（24）和下沟道区（23,22），并且设置在源区和漏区之间的半导体层中 从与栅极绝缘体的界面降序; 以及用于向下通道区域施加电压的偏置电极部件（V BAT），其中，所述沟道区域由第一半导体形成，所述覆盖层和所述下部沟道区域由 分别具有比第一半导体更大的带隙的第二半导体和第三半导体，偏置电极构件能够独立于栅电极施加电压。

公开(公告)号：US20050270529A1

公开(公告)日：2005-12-08

申请号：US11139777

申请日：2005-05-31

申请人： Mieko Yamagaki ,  Yu Mimura ,  Kazuyou Mizuno ,  Takeshi Takagi

发明人： Mieko Yamagaki ,  Yu Mimura ,  Kazuyou Mizuno ,  Takeshi Takagi

IPC分类号： G01J4/00

CPC分类号： G01J4/00

摘要： An object is to accurately measure the Stokes parameters, without the occurrence of polarization fluctuations or PDL during the splitting of the incident light. When the incident light is made incident on a first-stage prism, the light is split into two first splitting light rays. Next, the first split light rays are respectively incident on a pair of prisms of a second stage. Each of the pair of first split light rays is split into two rays by a second-stage prism, to obtain four second split light rays.

公开(公告)号：US06781163B2

公开(公告)日：2004-08-24

申请号：US10311293

申请日：2002-12-17

申请人： Takeshi Takagi ,  Akira Inoue

发明人： Takeshi Takagi ,  Akira Inoue

IPC分类号： H01L310328

CPC分类号： H01L29/802 ,  H01L21/823807 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/78687

摘要： A region of an Si layer (15) located between source and drain regions (19 and 20) is an Si body region (21) which contains an n-type impurity of high concentration. An Si layer (16) and an SiGe layer (17) are, in an as grown state, undoped layers into which no n-type impurity is doped. Regions of the Si layer 16 and the SiGe layer (17) located between the source and drain regions (19 and 20) are an Si buffer region (22) and an SiGe channel region (23), respectively, which contain the n-type impurity of low concentration. A region of an Si film (18) located directly under a gate insulating film (12) is an Si cap region (24) into which a p-type impurity (5×1017 atoms·cm−3) is doped. Accordingly, a semiconductor device in which an increase in threshold voltage is suppressed can be achieved.

摘要翻译： 位于源极和漏极区域（19和20）之间的Si层（15）的区域是包含高浓度的n型杂质的Si体区域（21）。 处于生长状态的Si层（16）和SiGe层（17）是未掺杂n型杂质的未掺杂层。 位于源极和漏极区域（19和20）之间的Si层16和SiGe层（17）的区域分别是包含n型的Si缓冲区（22）和SiGe沟道区（23） 低浓度的杂质。 位于栅极绝缘膜（12）正下方的Si膜（18）的区域是掺杂有p型杂质（5×10 17原子·cm -3）的Si帽区域（24）。 因此，可以实现抑制阈值电压增加的半导体装置。

公开(公告)号：US06737684B1

公开(公告)日：2004-05-18

申请号：US09659484

申请日：2000-09-11

申请人： Takeshi Takagi ,  Kenji Harafuji

发明人： Takeshi Takagi ,  Kenji Harafuji

IPC分类号： H01L310328

CPC分类号： H01L29/7376

摘要： There is provided a MQB layer as a multi-quantum barrier portion composed of well layers and barrier layers that are formed of extremely thin films having different compositions and alternately stacked. This enhances an effective barrier height by using the phenomenon that holes likely to flow from a SiGe base layer to a Si emitter layer are reflected by the MQB layer and thereby suppresses the reverse injection of the holes from the SiGe base layer into the Si emitter layer. As a result, the reverse injection of carriers is suppressed by the MQB layer even when the base doping concentration is increased, which provides a satisfactory current amplification factor and increases a maximum oscillation frequency. What results is a bipolar transistor having excellent RF characteristics such as current amplification factor, current gain cutoff frequency, and maximum oscillation frequency in a microwave band or the like.

摘要翻译： 提供了作为由阱层和阻挡层构成的多量子势垒部分的MQB层，其由具有不同组成的极薄膜并且交替堆叠而形成。 这通过使用可能从SiGe基极层流到Si发射极层的空穴被MQB层反射的现象增强了有效的势垒高度，从而抑制了从SiGe基极层向Si发射极层的反向注入 。 结果，即使当基极掺杂浓度增加时，MQB层抑制载流子的反向注入，这提供令人满意的电流放大因子并增加最大振荡频率。 具有优异RF特性的双极晶体管的结果如微波带等中的电流放大因子，电流增益截止频率和最大振荡频率。

公开(公告)号：US06340174B1

公开(公告)日：2002-01-22

申请号：US09603346

申请日：2000-06-26

申请人： Takeshi Takagi ,  Toshihiro Ishikawa

发明人： Takeshi Takagi ,  Toshihiro Ishikawa

IPC分类号： B60R2126

CPC分类号： B60R21/2346 ,  B60R21/2171 ,  B60R21/26 ,  B60R21/261 ,  B60R2021/26058 ,  B60R2021/26094

摘要： A rectifying plate (53) is inserted between gas outlets of a first inflator (51a) and/or a second inflator (51b) and a diffuser (55), and is formed with a plurality of openings which have different areas and uniform gas flows released from the gas outlets, and the opening area corresponding to the inactive second inflator (51b) of the first and second inflators (51a, 51b) is larger than the opening area corresponding to the active first inflator (51a).

摘要翻译： 整流板（53）插入在第一充气机（51a）和/或第二充气机（51b）和扩散器（55）的气体出口之间，并且形成有多个具有不同区域和均匀气流的开口 并且与第一和第二充气器（51a，51b）的不活动的第二充气器（51b）相对应的开口面积大于对应于活动的第一充气器（51a）的开口面积。