公开(公告)号：US20090104783A1

公开(公告)日：2009-04-23

申请号：US11887457

申请日：2006-03-30

申请人： Cheng-Guo Jin ,  Bunji Mizuno ,  Yuichiro Sasaki

发明人： Cheng-Guo Jin ,  Bunji Mizuno ,  Yuichiro Sasaki

IPC分类号： H01L21/302

CPC分类号： H01L21/31138 ,  H01J37/32412 ,  H01J37/32935 ,  H01J37/32963 ,  H01J2237/3342 ,  H01L21/2236 ,  H01L22/12

摘要： To provide an asher, an ashing method and an impurity doping apparatus group which can detect the interface between a surface hardening layer of a resist and an internal nonhardening layer and the interface between the nonhardening layer and a semiconductor substrate, with a high throughput.The invention provides the asher for plasma ashing the surface hardening layer formed on the resist and the internal nonhardening layer, the resist for use as a mask coated on the semiconductor substrate and doped with impurity, characterized by comprising an elipsometer for causing a linearly polarized light to enter the semiconductor substrate to detect a reflected, elliptically polarized light during plasma ashing, and detecting the interface between the hardening layer and the nonhardening layer and the interface between the nonhardening layer and the semiconductor substrate.

摘要翻译： 为了提供能够以高通量检测抗蚀剂的表面硬化层与内部非硬化层之间的界面以及非硬化层与半导体衬底之间的界面的灰化方法和杂质掺杂装置组。 本发明提供了用于等离子体灰化形成在抗蚀剂和内部非硬化层上的表面硬化层的抗蚀剂，用作掩模在半导体衬底上并掺杂有杂质的掩模的抗蚀剂，其特征在于包括用于引起线性偏振光 进入半导体衬底以在等离子体灰化期间检测反射的椭圆偏振光，并且检测硬化层和非硬化层之间的界面以及非硬化层和半导体衬底之间的界面。

公开(公告)号：US20070228294A1

公开(公告)日：2007-10-04

申请号：US11597324

申请日：2005-05-24

申请人： Hiroyuki Ito ,  Noriyuki Sakudo ,  Yuichiro Sasaki ,  Bunji Mizuno

发明人： Hiroyuki Ito ,  Noriyuki Sakudo ,  Yuichiro Sasaki ,  Bunji Mizuno

IPC分类号： G21K5/00 ,  H01J7/24

CPC分类号： H01J37/3171 ,  G21K1/14 ,  H01J37/026 ,  H01J2237/0044 ,  H01L21/26513 ,  H05H1/46

摘要： Disclosed is a charge neutralizing device which is capable of being applied to a substrate 13 having a large area and in which electrons having low energy of 5 eV or less, and preferably 2 eV, are supplied so that charge due to ion implantation and damage by the electrons are avoided with respect to a cusp device. The charge neutralizing device includes a microwave generating unit, a plasma generating unit that generates electron plasma using a microwave generated from the microwave generating unit, and a contact unit that brings the electron plasma generated from the plasma generating unit into contact with a beam plasma region including an ion beam.

摘要翻译： 公开了一种电荷中和装置，其能够施加到具有大面积的基板13，并且其中提供具有5eV或更小，优选为2eV的低能量的电子，使得由于离子注入和损坏而产生的电荷 相对于尖尖装置避免了电子。 电荷中和装置包括微波发生单元，使用由微波发生单元产生的微波产生电子等离子体的等离子体产生单元，以及将等离子体发生单元产生的电子等离子体与射束等离子体区域接触的接触单元 包括离子束。

公开(公告)号：US20070042578A1

公开(公告)日：2007-02-22

申请号：US10574863

申请日：2004-10-08

申请人： Yuichiro Sasaki ,  Cheng-Guo Jin ,  Bunji Mizuno

发明人： Yuichiro Sasaki ,  Cheng-Guo Jin ,  Bunji Mizuno

IPC分类号： H01L21/425

CPC分类号： H01L21/268

摘要： An object of this invention is to provide a method for making a junction which is simple in the process, high in the throughput, and can make a shallow junction with high accuracy. After the suitable state of a substrate surface adapted to the wavelength of an electromagnetic wave to be applied has been formed, the electromagnetic wave is applied to electrically activate impurities so that the excited energy is effectively absorbed within the impurity thin film, thereby effectively making a shallow junction.

摘要翻译： 本发明的目的是提供一种制造接头的方法，其工艺简单，生产能力高，并且可以以高精度形成浅结。 在形成适合于要施加的电磁波的波长的基板表面的合适状态之后，施加电磁波以电激活杂质，使得激发能量被有效地吸收在杂质薄膜内，从而有效地使 浅交界处

公开(公告)号：US08222128B2

公开(公告)日：2012-07-17

申请号：US12718549

申请日：2010-03-05

申请人： Yuichiro Sasaki ,  Bunji Mizuno ,  Cheng-Guo Jin

发明人： Yuichiro Sasaki ,  Bunji Mizuno ,  Cheng-Guo Jin

IPC分类号： H01L21/265

CPC分类号： H01L21/26506 ,  H01L21/223 ,  H01L21/2236 ,  H01L21/2254 ,  Y10T117/10

摘要： A method for introducing impurities includes a step for forming an amorphous layer at a surface of a semiconductor substrate, and a step for forming a shallow impurity-introducing layer at the semiconductor substrate which has been made amorphous, and an apparatus used therefore. Particularly, the step for forming the amorphous layer is a step for irradiating plasma to the surface of the semiconductor substrate, and the step for forming the shallow impurity-introducing layer is a step for introducing impurities into the surface which has been made amorphous.

摘要翻译： 用于引入杂质的方法包括在半导体衬底的表面形成非晶层的步骤，以及在半导体衬底上形成非晶化的浅杂质引入层的步骤以及因此使用的装置。 特别地，用于形成非晶层的步骤是用于将等离子体照射到半导体衬底的表面的步骤，并且用于形成浅掺杂杂质的层的步骤是将杂质引入已经被制成无定形的表面的步骤。

公开(公告)号：US07696072B2

公开(公告)日：2010-04-13

申请号：US12007736

申请日：2008-01-15

申请人： Yuichiro Sasaki ,  Bunji Mizuno ,  Cheng-Guo Jin

发明人： Yuichiro Sasaki ,  Bunji Mizuno ,  Cheng-Guo Jin

IPC分类号： H01L21/265

CPC分类号： H01L21/26506 ,  H01L21/223 ,  H01L21/2236 ,  H01L21/2254 ,  Y10T117/10

摘要： A method for introducing impurities includes a step for forming an amorphous layer at a surface of a semiconductor substrate, and a step for forming a shallow impurity-introducing layer at the semiconductor substrate which has been made amorphous, and an apparatus used therefore. Particularly, the step for forming the amorphous layer is a step for irradiating plasma to the surface of the semiconductor substrate, and the step for forming the shallow impurity-introducing layer is a step for introducing impurities into the surface which has been made amorphous.

摘要翻译： 用于引入杂质的方法包括在半导体衬底的表面形成非晶层的步骤，以及在半导体衬底上形成非晶化的浅杂质引入层的步骤以及因此使用的装置。 特别地，用于形成非晶层的步骤是用于将等离子体照射到半导体衬底的表面的步骤，并且用于形成浅掺杂杂质的层的步骤是将杂质引入已经被制成无定形的表面的步骤。

公开(公告)号：US07622725B2

公开(公告)日：2009-11-24

申请号：US12122492

申请日：2008-05-16

申请人： Bunji Mizuno ,  Ichiro Nakayama ,  Yuichiro Sasaki ,  Tomohiro Okumura ,  Cheng-Guo Jin ,  Hiroyuki Ito

发明人： Bunji Mizuno ,  Ichiro Nakayama ,  Yuichiro Sasaki ,  Tomohiro Okumura ,  Cheng-Guo Jin ,  Hiroyuki Ito

IPC分类号： G21K1/093 ,  H01J37/08

CPC分类号： H01L21/67167 ,  H01J37/32412 ,  H01L21/2236

摘要： It is an object to prevent functions expected originally from being unexhibited when impurities to be introduced into a solid sample are mixed with each other, and to implement plasma doping with high precision. In order to distinguish impurities which may be mixed from impurities which should not be mixed, first of all, an impurity introducing mechanism of a core is first distinguished. In order to avoid a mixture of the impurities in very small amounts, a mechanism for delivering a semiconductor substrate to be treated and a mechanism for removing a resin material to be formed on the semiconductor substrate are used exclusively.

公开(公告)号：US20090140174A1

公开(公告)日：2009-06-04

申请号：US11887371

申请日：2006-03-29

申请人： Bunji Mizuno ,  Ichiro Nakayama ,  Yuichiro Sasaki ,  Tomohiro Okumura ,  Cheng-Guo Jin ,  Hiroyuki Ito

发明人： Bunji Mizuno ,  Ichiro Nakayama ,  Yuichiro Sasaki ,  Tomohiro Okumura ,  Cheng-Guo Jin ,  Hiroyuki Ito

IPC分类号： H01J37/317 ,  H01J37/32

CPC分类号： H01L21/67167 ,  H01J37/32412 ,  H01L21/2236

摘要： It is an object to prevent functions expected originally from being unexhibited when impurities to be introduced into a solid sample are mixed with each other, and to implement plasma doping with high precision.In order to distinguish impurities which may be mixed from impurities which should not be mixed, first of all, an impurity introducing mechanism of a core is first distinguished. In order to avoid a mixture of the impurities in very small amounts, a mechanism for delivering a semiconductor substrate to be treated and a mechanism for removing a resin material to be formed on the semiconductor substrate are used exclusively.

摘要翻译： 当将待引入固体样品的杂质相互混合并且以高精度实现等离子体掺杂时，本发明的目的是防止最初预期的功能不被阻止。 为了区分可能与不混合的杂质混合的杂质，首先首先区分芯的杂质引入机理。 为了避免非常少量的杂质的混合，专门使用用于输送待处理的半导体衬底的机构和用于去除在半导体衬底上形成的树脂材料的机构。

公开(公告)号：US20090023262A1

公开(公告)日：2009-01-22

申请号：US11659197

申请日：2005-08-03

申请人： Cheng-Guo Jin ,  Yuichiro Sasaki ,  Hiroyuki Ito ,  Bunji Mizuno

发明人： Cheng-Guo Jin ,  Yuichiro Sasaki ,  Hiroyuki Ito ,  Bunji Mizuno

IPC分类号： H01L21/336

CPC分类号： H01L21/2236 ,  H01L21/268 ,  H01L21/28061 ,  H01L29/66575

摘要： To provide a fine transistor of high precision. A method for fabricating a transistor comprises the step of forming a gate electrode (340) on the surface of a semiconductor substrate, the step of introducing an impurity across said gate electrode (340), and the step of activating said impurity, thereby to form a source/drain region (310, 320) in the region having said impurity introduced thereinto. In the transistor fabricating method, the step of introducing said impurity includes a plasma irradiating step. The method further comprises the step of forming, prior to said activating step, a reflection preventing film (400) on the surface of the region having said impurity introduced thereinto, so that the optical reflectivity of said impurity introduced region may be lower than the reflectivity of said gate electrode surface.

摘要翻译： 提供高精度的精细晶体管。 一种制造晶体管的方法包括在半导体衬底的表面上形成栅电极（340）的步骤，将杂质引入所述栅电极（340）的步骤和激活所述杂质的步骤，形成 在其中引入了所述杂质的区域中的源/漏区（310,320）。 在晶体管制造方法中，引入所述杂质的步骤包括等离子体照射步骤。 该方法还包括在所述激活步骤之前形成在其中引入了所述杂质的区域的表面上的反射防止膜（400）的步骤，使得所述杂质引入区域的光学反射率可能低于反射率 的所述栅电极表面。

公开(公告)号：US20080182348A1

公开(公告)日：2008-07-31

申请号：US10572144

申请日：2004-09-22

申请人： Cheng-Guo Jin ,  Yuichiro Sasaki ,  Bunji Mizuno

发明人： Cheng-Guo Jin ,  Yuichiro Sasaki ,  Bunji Mizuno

IPC分类号： G01R31/26 ,  H01L21/26

CPC分类号： H01L21/2236 ,  H01L21/26513 ,  H01L21/268 ,  H01L22/12 ,  H01L22/20 ,  H01L22/26

摘要： A subject of the present invention is to realize an impurity doping not to bring about a rise of a substrate temperature.Another subject of the present invention is to measure optically physical properties of a lattice defect generated by the impurity doping step to control such that subsequent steps are optimized.An impurity doping method, includes a step of doping an impurity into a surface of a solid state base body, a step of measuring an optical characteristic of an area into which the impurity is doped, a step of selecting annealing conditions based on a measurement result to meet the optical characteristic of the area into which the impurity is doped, and a step of annealing the area into which the impurity is doped, based on the selected annealing conditions.

摘要翻译： 本发明的目的是实现杂质掺杂不会引起衬底温度的升高。 本发明的另一主题是测量由杂质掺杂步骤产生的晶格缺陷的光学物理性能，以便控制以使后续步骤被优化。 杂质掺杂方法包括将杂质掺杂到固态基体的表面的步骤，测量掺杂杂质的区域的光学特性的步骤，基于测量结果选择退火条件的步骤 以满足掺杂杂质的区域的光学特性，以及基于所选择的退火条件对杂质掺杂的区域进行退火的步骤。

公开(公告)号：US20060088989A1

公开(公告)日：2006-04-27

申请号：US10526999

申请日：2003-09-19

申请人： Yuichiro Sasaki ,  Bunji Mizuno ,  Ichiro Nakayama

发明人： Yuichiro Sasaki ,  Bunji Mizuno ,  Ichiro Nakayama

IPC分类号： H01L21/26 ,  H01L21/42

CPC分类号： H01L21/2236

摘要： A method of introducing an impurity and an apparatus for introducing the impurity forms an impurity layer easily in a shallower profile. Component devices manufactured taking advantage of these method or apparatus are also disclosed. When introducing a material to a solid substance which has an oxidized film or other film sticking at the surface, the present method and apparatus first removes the oxidized film and other film using at least one means selected from among the group consisting of a means for irradiating the surface of solid substance with plasma, a means for irradiating the surface of solid substance with gas and a means for dipping the surface of solid substance in a reductive liquid; and then, attaches or introduces a certain desired particle. The way of attaching, or introducing, a particle is bringing a particle-containing gas to make contact to the surface, which surface has been made to be free of the oxidized film and other film. Thus, the particle is attached or introduced to the surface, or the vicinity, of solid substance. The component devices are those manufactured taking advantage of the above method or apparatus.