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121.发明授权Creating a library for measuring a damaged structure formed on a wafer using optical metrology 失效使用光学测量法创建用于测量在晶圆上形成的损坏结构的库公开(公告)号：US07576851B2
公开(公告)日：2009-08-18
申请号：US11395636
申请日：2006-03-30
Applicant: Kevin Lally , Merritt Funk , Radha Sundararajan
Inventor： Kevin Lally , Merritt Funk , Radha Sundararajan
IPC: G01P3/36
CPC classification number: G01N21/95607
Abstract: A method of creating a library for measuring a plurality of damaged structures formed on a semiconductor wafer using optical metrology includes directing an incident beam on a first damaged structure. The first damaged structure was formed by modifying at least one process parameter in a dual damascene procedure. A diffracted beam is received from the first damaged structure. A measured diffraction signal is obtained based on the received diffracted beam. A first simulated diffraction signal is calculated. The first simulated diffraction signal corresponds to a hypothetical profile of the first damaged structure. The hypothetical profile includes an undamaged dielectric portion and a damaged dielectric portion. The measured diffraction signal is compared to the first simulated diffraction signal. If the measured diffraction signal and the first simulated diffraction signal match within a matching criterion, then the first simulated diffraction signal, the hypothetical profile of the first damaged structure, and an amount of dielectric damage corresponding to the damaged dielectric portion of the hypothetical profile are stored in a library.
Abstract translation: 使用光学测量法创建用于测量形成在半导体晶片上的多个损坏结构的库的方法包括将入射光束引导到第一损坏结构上。 通过在双镶嵌程序中修改至少一个工艺参数来形成第一个损坏的结构。 从第一损坏结构接收衍射光束。 基于接收的衍射光束获得测量的衍射信号。 计算第一个模拟衍射信号。 第一模拟衍射信号对应于第一损坏结构的假想轮廓。 假想轮廓包括未损坏的电介质部分和损坏的电介质部分。 将测量的衍射信号与第一模拟衍射信号进行比较。 如果测量的衍射信号和第一模拟衍射信号在匹配标准内匹配，则第一模拟衍射信号，第一损坏结构的假想轮廓和对应于假想轮廓损坏的介质部分的介电损伤量是 存储在库中。
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122.发明申请公开(公告)号：US20080311688A1
公开(公告)日：2008-12-18
申请号：US11762563
申请日：2007-06-13
Applicant: Asao Yamashita , Merritt Funk , Daniel Prager , Radha Sundararajan , Lee Chen
Inventor： Asao Yamashita , Merritt Funk , Daniel Prager , Radha Sundararajan , Lee Chen
CPC classification number: H01L22/12 , G06F17/5036 , H01L21/67253 , H01L2924/0002 , H01L2924/00
Abstract: The invention can provide a method of processing a substrate using Gate-Optimization processing sequences and evaluation libraries that can include gate-etch procedures, COR-etch procedures, and evaluation procedures.
Abstract translation: 本发明可以提供使用Gate-Optimization处理序列和评估库来处理衬底的方法，所述评估库可以包括栅极蚀刻程序，COR蚀刻程序和评估程序。
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公开(公告)号：US07451054B2
公开(公告)日：2008-11-11
申请号：US11668654
申请日：2007-01-30
Applicant: Sachin Deshpande , Merritt Funk
Inventor： Sachin Deshpande , Merritt Funk
IPC: G06F19/00
CPC classification number: G03F7/70875 , G03F7/70491 , G03F7/70525 , G03F7/70691
Abstract: A method for facilitating an ODP measurement of a semiconductor wafer. The method includes obtaining real time wafer characteristic data for a measurement site on said wafer and detecting a measured diffraction signal from a structure within the measurement site of the wafer. The measured diffraction signal is matched with a simulated diffraction signal stored in a wafer characteristic dependent profile library. A hypothetical profile structure associated with the simulated diffraction signal in the wafer characteristic dependent profile library is then identified. The real time wafer characteristic data is used to facilitate at least one of the matching and identifying.
Abstract translation: 一种用于促进半导体晶片的ODP测量的方法。 该方法包括获得在所述晶片上的测量位置的实时晶片特征数据，并且从晶片的测量位置内的结构检测测量的衍射信号。 测量的衍射信号与存储在晶片特征依赖型谱库中的模拟衍射信号相匹配。 然后识别与晶片特性相关型材库中的模拟衍射信号相关联的假设轮廓结构。 实时晶片特征数据用于促进匹配和识别中的至少一个。
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公开(公告)号：US07451011B2
公开(公告)日：2008-11-11
申请号：US10927514
申请日：2004-08-27
Applicant: Merritt Funk , Wesley Natzle
Inventor： Merritt Funk , Wesley Natzle
IPC: G06F19/00
CPC classification number: H01L22/20 , G05B2219/45031
Abstract: The invention relates to controlling a semiconductor processing system. Among other things, the invention relates to a run-to-run controller to create virtual modules to control a multi-pass process performed by a multi-chamber tool during the processing of a semiconductor wafer.
Abstract translation: 本发明涉及控制半导体处理系统。 其中，本发明涉及一种运行到运行的控制器，用于创建虚拟模块以控制在半导体晶片的处理期间由多室工具执行的多遍处理。
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公开(公告)号：US07395131B2
公开(公告)日：2008-07-01
申请号：US11057422
申请日：2005-02-15
Applicant: Merritt Funk
Inventor： Merritt Funk
CPC classification number: G05B15/02 , G05B19/41865 , G05B19/41875 , G05B23/0224 , G05B2219/32128 , G05B2219/33054 , G05B2219/33055 , G05B2219/35504 , G05B2219/36284 , G05B2219/42001 , Y02P90/14 , Y02P90/20 , Y02P90/22 , Y02P90/86
Abstract: A method for managing collected data in a semiconductor processing environment. The collected data can include: raw data collected during a process, trace file data received during a process, and process log file data received during a process. The raw data is synchronized with the trace file data and process log file data to create wafer data and summary data, and a file is created containing the wafer data and the summary data.
Abstract translation: 一种用于在半导体处理环境中管理收集的数据的方法。 收集的数据可以包括：在进程期间收集的原始数据，在进程期间接收到的跟踪文件数据以及在进程期间接收到的进程日志文件数据。 原始数据与跟踪文件数据和进程日志文件数据同步，以创建晶圆数据和汇总数据，创建一个包含晶圆数据和汇总数据的文件。
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Patent Agency Ranking
公开(公告)号：US20070238201A1
公开(公告)日：2007-10-11
申请号：US11390415
申请日：2006-03-28
Applicant: Merritt Funk , Radha Sundararajan , Daniel Prager , Wesley Natzle
Inventor： Merritt Funk , Radha Sundararajan , Daniel Prager , Wesley Natzle
IPC: H01L21/66
CPC classification number: H01L22/12
Abstract: A method of processing a wafer is presented that includes creating a pre-processing measurement map using measured metrology data for the wafer including metrology data for at least one isolated structure on the wafer, metrology data for at least one nested structure on the wafer, bi-layer mask data, and BARC layer data. At least one pre-processing prediction map is calculated for the wafer. A pre-processing confidence map is calculated for the wafer. The pre-processing confidence map includes a set of confidence data for the plurality of dies on the wafer. A prioritized measurement site is determined when the confidence data for one or more dies is not within the confidence limits. A new measurement recipe that includes the prioritized measurement site is then created.
Abstract translation: 提出了一种处理晶片的方法，其包括使用测量的晶片的测量数据创建预处理测量图，包括晶片上的至少一个隔离结构的测量数据，晶片上的至少一个嵌套结构的度量数据，bi 层掩模数据和BARC层数据。 为晶片计算至少一个预处理预测图。 计算晶片的预处理置信图。 预处理置信图包括晶片上的多个管芯的一组置信数据。 当一个或多个管芯的置信度数据不在置信限度内时，确定优先测量点。 然后创建包含优先测量站点的新测量配方。
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127.发明申请Creating a library for measuring a damaged structure formed on a wafer using optical metrology 失效使用光学测量法创建用于测量在晶圆上形成的损坏结构的库公开(公告)号：US20070233404A1
公开(公告)日：2007-10-04
申请号：US11395636
申请日：2006-03-30
Applicant: Kevin Lally , Merritt Funk , Radha Sundararajan
Inventor： Kevin Lally , Merritt Funk , Radha Sundararajan
CPC classification number: G01N21/95607
Abstract: A method of creating a library for measuring a plurality of damaged structures formed on a semiconductor wafer using optical metrology includes directing an incident beam on a first damaged structure. The first damaged structure was formed by modifying at least one process parameter in a dual damascene procedure. A diffracted beam is received from the first damaged structure. A measured diffraction signal is obtained based on the received diffracted beam. A first simulated diffraction signal is calculated. The first simulated diffraction signal corresponds to a hypothetical profile of the first damaged structure. The hypothetical profile includes an undamaged dielectric portion and a damaged dielectric portion. The measured diffraction signal is compared to the first simulated diffraction signal. If the measured diffraction signal and the first simulated diffraction signal match within a matching criterion, then the first simulated diffraction signal, the hypothetical profile of the first damaged structure, and an amount of dielectric damage corresponding to the damaged dielectric portion of the hypothetical profile are stored in a library.
Abstract translation: 使用光学测量法创建用于测量形成在半导体晶片上的多个损坏结构的库的方法包括将入射光束引导到第一损坏结构上。 通过在双镶嵌程序中修改至少一个工艺参数来形成第一个损坏的结构。 从第一损坏结构接收衍射光束。 基于接收的衍射光束获得测量的衍射信号。 计算第一个模拟衍射信号。 第一模拟衍射信号对应于第一损坏结构的假想轮廓。 假想轮廓包括未损坏的电介质部分和损坏的电介质部分。 将测量的衍射信号与第一模拟衍射信号进行比较。 如果测量的衍射信号和第一模拟衍射信号在匹配标准内匹配，则第一模拟衍射信号，第一损坏结构的假想轮廓和对应于假想轮廓损坏的介质部分的介电损伤量是 存储在库中。
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128.发明申请公开(公告)号：US20070229807A1
公开(公告)日：2007-10-04
申请号：US11396214
申请日：2006-03-30
Applicant: Kevin Lally , Merritt Funk , Radha Sundararajan
Inventor： Kevin Lally , Merritt Funk , Radha Sundararajan
IPC: G01N21/00
CPC classification number: G01N21/95607 , G01N21/4788 , G01N21/9501 , H01L22/12 , H01L2924/0002 , H01L2924/00
Abstract: A method of measuring a damaged structure formed on a semiconductor wafer using optical metrology, the method includes obtaining a measured diffraction signal from a damaged periodic structure. A hypothetical profile of the damaged periodic structure is defined. The hypothetical profile having an undamaged portion, which corresponds to an undamaged area of a first material in the damaged periodic structure, and a damaged portion, which corresponds to a damaged area of the first material in the damaged periodic structure. The undamaged portion and the damaged portion have different properties associated with them. A simulated diffraction signal is calculated for the hypothetical damaged periodic structure using the hypothetical profile. The measured diffraction signal is compared to the simulated diffraction signal. If the measured diffraction signal and the simulated diffraction signal match within a matching criterion, then a damage amount for the damaged periodic structure is established based on the damaged portion of the hypothetical profile used to calculate the simulated diffraction signal.
Abstract translation: 一种使用光学测量法测量在半导体晶片上形成的损坏结构的方法，该方法包括从损坏的周期性结构获得测量的衍射信号。 定义损坏的周期结构的假设剖面。 具有未损坏部分的假想轮廓，其对应于损坏的周期性结构中的第一材料的未损坏区域，以及损坏部分，其对应于损坏的周期性结构中的第一材料的损坏区域。 未损伤部分和损坏部分具有与它们相关联的不同性质。 使用假设曲线计算假设损坏的周期性结构的模拟衍射信号。 将测得的衍射信号与模拟衍射信号进行比较。 如果测量的衍射信号和模拟衍射信号在匹配标准内匹配，则基于用于计算模拟衍射信号的假想轮廓的损坏部分建立损坏的周期性结构的损伤量。
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公开(公告)号：US07212878B2
公开(公告)日：2007-05-01
申请号：US10927500
申请日：2004-08-27
Applicant: Merritt Funk , Wesley Natzle
Inventor： Merritt Funk , Wesley Natzle
IPC: G06F19/00
CPC classification number: G05B19/41865 , G05B2219/45031 , H01L22/20 , Y02P80/114 , Y02P90/20 , Y02P90/86
Abstract: The invention relates to controlling a semiconductor processing system. Among other things, the invention relates to a run-to-run controller to create virtual modules to control a multi-pass process performed by a multi-chamber tool during the processing of a semiconductor wafer.
Abstract translation: 本发明涉及控制半导体处理系统。 其中，本发明涉及一种运行到运行的控制器，用于创建虚拟模块以控制在半导体晶片的处理期间由多室工具执行的多遍处理。
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公开(公告)号：US20060064193A1
公开(公告)日：2006-03-23
申请号：US10944463
申请日：2004-09-20
Applicant: Asao Yamashita , Merritt Funk , Daniel Prager
Inventor： Asao Yamashita , Merritt Funk , Daniel Prager
IPC: G06F19/00
CPC classification number: H01L22/20 , H01L21/32139 , H01L2924/0002 , H01L2924/00
Abstract: This method includes a method for etch processing that allows the bias between isolated and nested structures/features to be adjusted, correcting for a process wherein the isolated structures/features need to be smaller than the nested structures/features and wherein the nested structures/features need to be reduced relative to the isolated structures/features, while allowing for the critical control of trimming.
Abstract translation: 该方法包括用于蚀刻处理的方法，其允许调整隔离结构/嵌套结构/特征之间的偏置，校正其中隔离结构/特征需要小于嵌套结构/特征的过程，并且其中嵌套结构/特征 需要相对于孤立的结构/特征而减少，同时允许对修剪的关键控制。
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