METER SOCKET BLOCK ASSEMBLY
    121.
    发明申请
    METER SOCKET BLOCK ASSEMBLY 有权
    仪表插座组件

    公开(公告)号:US20130273772A1

    公开(公告)日:2013-10-17

    申请号:US13856482

    申请日:2013-04-04

    IPC分类号: H02B1/03

    CPC分类号: H02B1/03 G01R11/04

    摘要: A meter socket block assembly for a meter socket connected to a meter having at least one meter blade, wherein the meter socket includes at least one conductor. The meter socket block assembly includes at least one lug and jaw body, the body having a lug portion and a first jaw portion which are unistructurally formed and wherein the lug portion is connected to the conductor. The meter socket block assembly also includes a second jaw portion attached to the first jaw portion to form a jaw for connecting to the meter blade. Further, the meter socket block assembly includes a base having a lug cavity for receiving the body and at least one snap tab for attaching the body to the base.

    摘要翻译: 一种用于连接到具有至少一个仪表叶片的仪表的仪表插座的仪表插座块组件,其中所述仪表插座包括至少一个导体。 仪表插座块组件包括至少一个凸耳和钳口体,本体具有突出部分和未结构地形成的第一钳口部分,并且其中凸耳部分连接到导体。 仪表插座块组件还包括附接到第一钳口部分的第二钳口部分,以形成用于连接到仪表刀片的钳口。 此外,仪表插座块组件包括具有用于接收主体的凸耳腔的基座和用于将主体附接到基座的至少一个卡扣突起。

    Systems and methods for selective decode algorithm modification
    122.
    发明授权
    Systems and methods for selective decode algorithm modification 有权
    用于选择性解码算法修改的系统和方法

    公开(公告)号:US08527858B2

    公开(公告)日:2013-09-03

    申请号:US13284767

    申请日:2011-10-28

    IPC分类号: G06F11/10 H03M13/00

    摘要: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a combination data decoder circuit. The combination data decoder circuit includes a first decoder circuit and a second decoder circuit. The first decoder circuit is operable to apply a first data decode algorithm to a decoder input to yield a decoded output. The second decoder circuit is operable to apply a second data decode algorithm to a subset of the decoded output to modify at least one element of the decoded output to yield a modified decoded output.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,公开了包括组合数据解码器电路的数据处理系统。 组合数据解码器电路包括第一解码器电路和第二解码器电路。 第一解码器电路可操作以将第一数据解码算法应用于解码器输入以产生解码输出。 第二解码器电路可操作以将第二数据解码算法应用于解码输出的子集,以修改解码输出的至少一个元素以产生经修改的解码输出。

    Systems and Methods for Selective Decode Algorithm Modification
    124.
    发明申请
    Systems and Methods for Selective Decode Algorithm Modification 有权
    选择性解码算法修改的系统与方法

    公开(公告)号:US20130111309A1

    公开(公告)日:2013-05-02

    申请号:US13284767

    申请日:2011-10-28

    IPC分类号: H03M13/09 G06F11/10

    摘要: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a combination data decoder circuit. The combination data decoder circuit includes a first decoder circuit and a second decoder circuit. The first decoder circuit is operable to apply a first data decode algorithm to a decoder input to yield a decoded output. The second decoder circuit is operable to apply a second data decode algorithm to a subset of the decoded output to modify at least one element of the decoded output to yield a modified decoded output.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,公开了包括组合数据解码器电路的数据处理系统。 组合数据解码器电路包括第一解码器电路和第二解码器电路。 第一解码器电路可操作以将第一数据解码算法应用于解码器输入以产生解码输出。 第二解码器电路可操作以将第二数据解码算法应用于解码输出的子集,以修改解码输出的至少一个元素以产生经修改的解码输出。

    Systems and Methods for Symbol Selective Scaling in a Data Processing Circuit
    125.
    发明申请
    Systems and Methods for Symbol Selective Scaling in a Data Processing Circuit 审中-公开
    数据处理电路中符号选择性缩放的系统和方法

    公开(公告)号:US20130111297A1

    公开(公告)日:2013-05-02

    申请号:US13284826

    申请日:2011-10-28

    IPC分类号: H03M13/09

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing system is discussed that includes: a data detector circuit, a symbol selective scaling circuit, and a data decoder circuit. The data detector circuit is operable to apply a data detection algorithm to a data input guided by a first data set derived from a decoded output to yield a detected output. The symbol selective scaling circuit is operable to selectively scale one or more symbols of a second data set derived from the detected output to yield a scaled data set. The data decoder circuit operable to apply a data decode algorithm to a third data set derived from the scaled data set to yield the decoded output.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,讨论了包括数据检测器电路,符号选择缩放电路和数据解码器电路的数据处理系统。 数据检测器电路可操作以将数据检测算法应用于由从解码输出导出的第一数据集引导的数据输入,以产生检测到的输出。 符号选择性缩放电路可操作以选择性地缩放从检测到的输出导出的第二数据集的一个或多个符号,以产生缩放的数据集。 数据解码器电路可操作以将数据解码算法应用于从缩放数据集导出的第三数据集,以产生解码输出。

    Crossing bus support apparatus, connectors, systems, and assemblies and methods of installing same
    126.
    发明授权
    Crossing bus support apparatus, connectors, systems, and assemblies and methods of installing same 有权
    交叉总线支持设备,连接器,系统和组件及其安装方法

    公开(公告)号:US08420934B2

    公开(公告)日:2013-04-16

    申请号:US12898784

    申请日:2010-10-06

    申请人: Fan Zhang

    发明人: Fan Zhang

    IPC分类号: H02G5/00 H05K5/00

    摘要: Embodiments provide a crossing bus support apparatus and connectors thereof. The crossing bus support apparatus includes a body structure having a first portion with a plurality of phase bus slots, the phase bus slots adapted to receive a plurality of crossing buses, a first connector on a first end having dual protrusions each protrusion having an interlockable feature; and a second connector on a second end having dual protrusions each protrusion having an interlockable feature. The crossing bus support apparatus may be used in pairs to capture crossing buses into the phase bus slots. Systems, assemblies, connectors, and methods of installing and utilizing the crossing bus support apparatus are provided, as are other aspects.

    摘要翻译: 实施例提供了一种交叉总线支撑装置及其连接器。 交叉母线支撑装置包括主体结构,该主体结构具有第一部分,该第一部分具有多个相位总线槽,该相位总线槽适于接收多个交叉母线;第一端上具有双突起的第一连接器,每个突起具有互锁特征 ; 并且在第二端上具有双突起的第二连接器,每个突起具有互锁特征。 交叉总线支撑装置可以成对使用以将交叉总线捕获到相位总线槽中。 提供了安装和利用交叉总线支持装置的系统,组件,连接器和方法,以及其他方面。

    Method for Utilizing Soft X-Ray Microimaging for Cancer Cell Image Recognition
    127.
    发明申请
    Method for Utilizing Soft X-Ray Microimaging for Cancer Cell Image Recognition 有权
    用于癌症细胞图像识别的软X射线成像的方法

    公开(公告)号:US20130071876A1

    公开(公告)日:2013-03-21

    申请号:US13699116

    申请日:2011-05-09

    IPC分类号: G01N23/04

    CPC分类号: G06K9/00127 G01N23/04

    摘要: This invention discloses a method for utilizing soft X-ray microimaging for cancer cell image recognition. The method comprises the steps of 1) sample preparation; 2) pathological examination; 3) soft X-ray imaging; and 4) analysis and recognition. This invention applies soft X-ray microimaging for cancer cell image recognition, successfully obtains the soft X-ray microscopic image of a cancer cell by scanning the cancer cell with synchrotron radiation soft X-ray microimaging, provides recognition steps and experimental data, and establishes a method for utilizing soft X-ray microimaging for cancer cell image recognition. This invention creates a method for analyzing soft X-ray microscopic images, provides a novel synchrotron radiation soft X-ray pathological diagnosis method for cancer diagnosis, and provides an extremely valuable basis for the creation and clinical application of soft X-ray pathology in the 21st century.

    摘要翻译: 本发明公开了一种利用软X射线微成像进行癌细胞图像识别的方法。 该方法包括以下步骤:1)样品制备; 2)病理检查; 3)软X射线成像; 和4)分析和认可。 本发明应用软X射线微成像进行癌细胞图像识别,通过用同步辐射软X射线微成像扫描癌细胞,成功获得癌细胞的软X射线显微镜图像,提供识别步骤和实验数据,并建立 一种利用软X射线微成像进行癌细胞图像识别的方法。 本发明创建了一种分析软X射线显微镜图像的方法,为癌症诊断提供了一种新型的同步辐射软X射线病理诊断方法,为软X射线病理学的创造和临床应用提供了极其宝贵的基础 21世纪。

    Systems and Methods for Non-Binary Decoding Biasing Control
    128.
    发明申请
    Systems and Methods for Non-Binary Decoding Biasing Control 有权
    非二进制解码偏倚控制系统与方法

    公开(公告)号:US20130067297A1

    公开(公告)日:2013-03-14

    申请号:US13227538

    申请日:2011-09-08

    IPC分类号: H03M13/45 G06F11/10

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detector circuit, a biasing circuit, and a data decoder circuit. The data detector circuit is operable to apply a data detection algorithm to a series of symbols to yield a detected output, and the detected output includes a series of soft decision data corresponding to non-binary symbols. The biasing circuit is operable apply a bias to each of the series of soft decision data to yield a series of biased soft decision data. The data decoder circuit is operable to apply a data decoding algorithm to the series of biased soft decision data corresponding to the non-binary symbols.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了包括数据检测器电路,偏置电路和数据解码器电路的数据处理电路。 数据检测器电路可操作以将数据检测算法应用于一系列符号以产生检测到的输出,并且所检测的输出包括与非二进制符号对应的一系列软判决数据。 偏置电路可操作地将偏置应用于该系列软判决数据中的每一个,以产生一系列偏置的软判决数据。 数据解码器电路可操作以将数据解码算法应用于对应于非二进制符号的一系列偏置软判决数据。

    Systems and Methods for Generating Predictable Degradation Bias
    129.
    发明申请
    Systems and Methods for Generating Predictable Degradation Bias 有权
    用于产生可预测的降解偏差的系统和方法

    公开(公告)号:US20130063835A1

    公开(公告)日:2013-03-14

    申请号:US13227544

    申请日:2011-09-08

    IPC分类号: G11B5/03 G11C5/14 G11B5/035

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detector circuit and a bias calculation circuit. The data detector circuit is operable to apply a data detection algorithm to a first data set to yield a first series of soft decision data, and to apply the data detection algorithm to a second data set to yield a second series of soft decision data. The bias calculation circuit operable to calculate a series of bias values based at least in part on the first series of soft decision data and the second series of soft decision data. The series of bias values correspond to a conversion between the first series of soft decision data and the second series of soft decision data.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了包括数据检测器电路和偏置计算电路的数据处理电路。 数据检测器电路可操作以将数据检测算法应用于第一数据集以产生第一系列软判决数据,并将数据检测算法应用于第二数据集以产生第二系列软判决数据。 偏置计算电路可操作以至少部分地基于第一系列软判决数据和第二系列软判决数据来计算一系列偏置值。 一系列偏差值对应于第一系列软判决数据与第二系列软判决数据之间的转换。