Abstract:
An integrated circuit (IC) includes a first processing module that converts inbound data into an inbound digital audio signal and converts an outbound digital audio signal into outbound data. A second processing module performs a user application that includes at least one of generating of an inbound analog audio signal and generating an outbound analog audio signal. A third processing module performs an operating system algorithm to coordinate operation of at least one user application.
Abstract:
A local oscillation generator (LO-GEN) maintains a fixed bandwidth using a voltage controlled oscillator (VCO) calibration module and gain calibration module that together compensate for variations in the VCO gain based on the oscillation frequency. During an open loop calibration of the LO-GEN, the VCO calibration module programs the VCO gain to an initial coarse value based on the oscillation frequency and then the gain calibration module adjusts the charge pump current to compensate for VCO gain changes.
Abstract:
A method and apparatus is disclosed to effectively frequency translate a filter characterized as a low quality factor (Q) filter, corresponding to a baseband frequency of approximately zero Hertz or to an intermediate frequency (IF), to a filter characterized as a high Q filter at frequencies greater than the baseband frequency or the IF. A downconversion mixer frequency translates a communication signal to the baseband frequency or the IF using a first local oscillator signal to provide a downconverted communication signal. A filter corresponding to the baseband frequency or the IF filters the downconverted communication signal to provide a filtered communication signal. An upconversion mixer frequency translates a communication signal using a second local oscillator signal. The frequency translation by the upconversion mixer, in effect, translates the filter characterization from the low Q filter to the high Q filter at frequencies greater than the baseband frequency or the IF.
Abstract:
A SAW-less transmitter includes an up-conversion mixing module, a frequency translated BPF (FTBPF), an output module, and a power amplifier driver. The up-conversion mixing module converts an outbound symbol stream into an up-converted signal. The FTBPF frequency translates a baseband filter response to an RF bandpass filter response and filter the up-converted signal in accordance with the RF bandpass filter response to produce a filtered up-converted signal. The output module conditions the filtered up-converted signal to produce a conditioned up-converted signal. The power amplifier driver amplifies the conditioned up-converted signal to produce an outbound RF signal.
Abstract:
A circuit includes a local oscillator of a transmitter, the local oscillator to generate a transmitter local oscillator signal. A switch controlled by the transmitter local oscillator signal connects with a baseband impedance element to generate a notch frequency signal. The notch frequency signal is added to a transmitter leakage signal to attenuate the transmitter leakage signal prior to demodulation of a desired receiver signal by a receiver.
Abstract:
A receiver includes a sample and hold module, a discrete time filter module, and a conversion module. The sample and hold module is operable to sample and hold a first inbound wireless signal and a second inbound wireless signal to produce a frequency domain sample pulse train. The discrete time filter module is operable to filter the frequency domain sample pulse train to produce a first filtered sample pulse corresponding to the first inbound wireless signal and to produce a second filtered sample pulse corresponding to the second inbound wireless signal. The conversion module is operable to convert the first filtered sample pulse into a first inbound baseband signal and to convert the second filtered sample pulse into a second inbound baseband signal.
Abstract:
A duplexing system may be used with an electronic device. The duplexing system may include a duplexer connected with an antenna. The duplexing system may include a balancing network. The balancing network may be connected with the duplexer, have an adjustable network impedance, and include an active component. The balancing network may be configured to adjust the network impedance to match an antenna impedance of the antenna.
Abstract:
A receiver includes a sample and hold module, a discrete time filter module, and a conversion module. The sample and hold module includes a sample switching module, an impedance module, and a hold switching module. The sample switching module outputs samples of an inbound wireless signal in accordance with a sampling clock signal. The impedance module temporarily stores the samples. The hold switching module outputs a filtered representation of the samples in accordance with a hold clock signal to produce a frequency domain sample pulse train, wherein a filter response of the sample and hold module is in accordance with a ratio between the sampling clock signal and the hold clock signal. The discrete time filter module, which may be programmable, filters the frequency domain sample pulse train. The conversion module, which may be programmable, converts the filtered sample pulse into an inbound baseband signal.
Abstract:
An RF front-end with on-chip transmitter/receiver isolation using a gyrator is presented herein. The RF front end is configured to support full-duplex communication and includes a gyrator and a transformer. The gyrator includes a metal plate and an inductor that are configured to isolate the input of a low-noise amplifier (LNA) from the output of a power amplifier (PA) using the Hall effect. The gyrator is further configured to isolate the output of the PA from the input of the LNA. The gyrator is at least partially or fully capable of being integrated on silicon-based substrate.
Abstract:
At least a first capacitor is formed on a substrate and connected to a first differential node of a differential circuit, and the first capacitor may be variable in capacitance. A second capacitor is formed on the substrate and connected to a second differential node of the differential circuit, and the second capacitor also may be variable. A third capacitor is connected between the first differential node and the second differential node, and is formed at least partially above the first capacitor. In this way, a size of the first capacitor and/or the second capacitor may be reduced on the substrate, and capacitances of the first and/or second capacitor(s) may be adjusted in response to a variable characteristic of one or more circuit components of the differential circuit.