Abstract:
a data transfer system and method are provided in the present invention. Wherein, the data transfer system and method comprises a source data obtaining service module and a target table updating service module, both of which are divided into a main part and an affiliated part, and wherein the affiliated part is a dynamic function library, which can package sub-processings such as source data obtaining, data transformation and data inserting/updating. Meanwhile, the data transfer system and method can support quasi real-time data transfer tasks and real-time data transfer tasks at the same time. The data transfer system and method support multi-computer disaster tolerance and extension, and the customization of the dynamic function library can facilitate the change in the requirements of data transfer.
Abstract:
The present invention is a system and method for generating predictions for various parameters in a reservoir. The invention includes receiving input data characterizing the reservoir and determining transient areas. The transient areas are determined by receiving data from the reservoir, transforming the data using discrete wavelet transformation to produce transformed data, removing outliers from the transformed data, identifying and reducing noise from in the transformed data and then detecting transient areas in the transformed data. A computer model is produced in response to the transient data and predictions for parameters in the reservoir are determined. These predictions are verified by comparing predictive values with a reservoir model and then the predictions for the various parameters can be used.
Abstract:
A system, method and apparatus are disclosed, in which an instruction scheduler of a compiler, e.g., a shader compiler, reduces instruction latency based on a determined instruction distance between a dependent predecessor and successor instructions.
Abstract:
The invention relates to the use of GCC (Genome Conformation Capture) technology in determining the three dimensional arrangement of an entire genome.
Abstract:
Disclosed are methods and systems for determining the three-dimensional structure of chromatin in eukaryotic cells. More specifically, disclosed are methods and systems for obtaining chromatin structural information by surface immobilization, i.e tethering crosslinked protein:DNA complexes and/or ligated DNA complexes to media such as beads, gels, and or matrices during the conformation capture assay. In general, the method includes contacting a cell with a cross-linking reagent to cross-link DNA and protein in the cell; lysing the cell, producing cross-linked protein:DNA complexes by cutting the chromatin using a chemical, physical or enzymatic method, substantially immobilizing the cross-linked protein:DNA complexes, ligating the cross-linked protein:DNA complexes intramolecularly such that the ligated protein:DNA complexes represent structural organization of the chromatin; characterizing the ligated DNA by sequencing or other methods; and identifying any structural organization of the chromatin. The structural organization preferably includes information relating to interacting loci of the chromatin.
Abstract:
A dynamic bus inversion (DBI) method and system are described. In various embodiments, a transmitter transmits data over a multi-bit high-speed bus to a receiver. In an embodiment, the transmitter determines whether to invert the bus based on the number of data bits that will be transitioning to a new value. If it is determined that the bus is to be inverted, the transmitter encodes a DBI signal on a shared line of the bus. In an embodiment, the shared line is used for different purposes at different times, obviating the need for a dedicated line or pin for the encoded DBI signal. The receiver receives and decodes the DBI signal and, in response, appropriately decodes the received data.
Abstract:
A power converter having a switched capacitor buck/boost operation has first and second switches coupled to a first switching node, third and fourth switches coupled to a second switching node, a capacitor coupled between the first and second switching nodes, and an inductor coupled to the first switching node. A switch controller controls the switches to operate in voltage step-down mode and voltage step-up mode depending on a difference between converter output voltage VOUT and converter input voltage VIN. In a buck-optimized topology operating in a step-down mode, an output current flowing through the first switching node flows through only one switch at a given time. In a boost-optimized topology operating in a step-up mode, an output current flowing through the first switching node flows through only one switch at a given time. As a result, a more compact and efficient power converter may be realized at lower cost.
Abstract:
A method and a wireless access point device for a network layer handoff of a wireless mobile node over a wireless local area network. The method includes detecting a wireless mobile node that has moved into the coverage area of the wireless access point device; maintaining an available IP address pool; selecting a temporary IP address from the IP access pool in response to the detection of the mobile node moving into the coverage area; and assigning a temporary IP address to the mobile node for use by the node during an interim period. The method produces a network layer handoff of a wireless mobile node over a local area network. Also provided is a computer readable article of manufacture tangibly embodying computer readable instructions for executing the steps of the method.
Abstract:
An IO method and system for bit-deskewing are described. Embodiment includes a computer system with multiple components that transfer data among them. In one embodiment, a system component receives a forward strobe signal and multiple data bit signals from a transmitting component. The receiving component includes a forward strobe clock recovery circuit configurable to align a forward strobe sampling clock so as to improve sampling accuracy. The receiving component further includes at least one data bit clock recovery circuit configurable to align a data bit sampling clock so as to improve sampling accuracy, and to receive a signal from the forward strobe clock recovery circuit that causes the data bit sampling clock to track the forward strobe sampling clock during system operation.
Abstract:
An amplifier is provided that includes an output portion that sources and sinks current associated with an output load and an amplification portion that is biased by a relatively small bias current with respect to an output current of the amplifier. The amplification portion provides an amplified output signal to the output portion. The amplifier further comprises at least one impedance component coupled between the output portion and the amplification portion to alter at least one pole associated with the amplifier to mitigate instability of the amplifier related to the relatively small bias current.