Hybrid Communication Networks
    122.
    发明申请
    Hybrid Communication Networks 审中-公开
    混合通信网络

    公开(公告)号:US20150085883A1

    公开(公告)日:2015-03-26

    申请号:US14557858

    申请日:2014-12-02

    Abstract: Systems and methods for designing, using, and/or implementing hybrid communication networks are described. In various embodiments, these systems and methods may be applicable to power line communications (PLC). For example, one or more of the techniques disclosed herein may include methods to coordinate medium-to-low voltage (MV-LV) and low-to-low voltage (LV-LV) PLC networks when the MV-LV network operates in a frequency subband mode and the LV-LV network operates in wideband mode (i.e., hybrid communications). In some cases, MV routers and LV routers may have different profiles. For instance, MV-LV communications may be performed using MAC superframe structures, and first-level LV to lower-level LV communications may take place using a beacon mode. Lower layer LV nodes may communicate using non-beacon modes. Also, initial scanning procedures may encourage first-to-second-level LV device communications rather than MV-to-first-level LV connections.

    Abstract translation: 描述了用于设计,使用和/或实现混合通信网络的系统和方法。 在各种实施例中,这些系统和方法可以适用于电力线通信(PLC)。 例如,本文公开的技术中的一个或多个技术可以包括当MV-LV网络以一个或多个的方式工作时协调中低电压(MV-LV)和低到低电压(LV-LV)PLC网络的方法 频率子带模式和LV-LV网络在宽带模式(即,混合通信)中工作。 在某些情况下,MV路由器和LV路由器可能具有不同的配置文件。 例如,可以使用MAC超帧结构来执行MV-LV通信,并且可以使用信标模式进行第一级LV到低级LV通信。 下层LV节点可以使用非信标模式进行通信。 此外,初始扫描程序可以鼓励第一级到第二级LV器件通信,而不是MV到一级LV连接。

    Channel Selection in Power Line Communications
    123.
    发明申请
    Channel Selection in Power Line Communications 审中-公开
    电力线通信中的通道选择

    公开(公告)号:US20140355474A1

    公开(公告)日:2014-12-04

    申请号:US14464752

    申请日:2014-08-21

    Abstract: A power line communication (PLC) device comprises a processor and a memory coupled to the processor. The memory is configured to store program instructions executable by the processor to cause the PLC device perform operations. One or more time slots are sequentially scan in each of a plurality of frequency bands. A packet transmitted by a second PLC device to the PLC device over one of the plurality of frequency bands is detected. Additional packets received from the second PLC device across the plurality of frequency bands based, at least in part, upon the detected packet are synchronized. The additional packets are organized in a plurality of frames, each of the plurality of frames having been transmitted by the second PLC device to the PLC device over a respective one of the plurality of frequency bands. Each frame has a plurality of time slots, and each time slot has a pair of beacon and bandscan packets, Each bandscan packet includes information indicating a frequency band distinct from any of the plurality of different frequency bands to be used by the second PLC device to communicate with the first PLC device in a direction from the second PLC device to the first PLC device.

    Abstract translation: 电力线通信(PLC)设备包括处理器和耦合到处理器的存储器。 存储器被配置为存储可由处理器执行的程序指令,以使PLC设备执行操作。 在多个频带的每一个中顺序地扫描一个或多个时隙。 检测由第二PLC设备通过多个频带中的一个发送到PLC设备的分组。 至少部分地基于检测到的分组,跨多个频带从第二PLC设备接收的附加分组被同步。 所述附加分组被组织成多个帧,所述多个帧中的每一个已经由所述第二PLC设备通过所述多个频带中的相应一个频带发送到所述PLC设备。 每帧具有多个时隙,并且每个时隙具有一对信标和频带扫描分组,每个频带扫描分组包括指示要由第二PLC设备使用的多个不同频带中的任一个的频带的信息, 与第一PLC设备在从第二PLC设备到第一PLC设备的方向通信。

    High Performance Turbo DPSK
    124.
    发明申请
    High Performance Turbo DPSK 审中-公开
    高性能Turbo DPSK

    公开(公告)号:US20140064412A1

    公开(公告)日:2014-03-06

    申请号:US14015728

    申请日:2013-08-30

    CPC classification number: H04L27/22 H04L25/03171 H04L25/03242 H04L27/2071

    Abstract: A system includes a DPSK transmitter and a DPSK receiver. The DPSK transmitter is configured to encode a signal and transmit the encoded signal as a sequence of symbols. The DPSK receiver is configured to decode the sequence of symbols into bit values. The DPSK receiver further includes a first decoder which is configured to receive the sequence of the symbols, and to estimate extrinsic information for each symbol and forward the extrinsic information to a second decoder. Moreover, if magnitude of a LLR received form a second decoder is greater than a threshold, the first decoder is configured to determine a bit value of a received symbol, without considering neighboring symbols in the sequence of symbols. Still moreover, if the magnitude of the LLR received from the second decoder is not greater than the threshold, the first decoder is configured to continue to decode the received symbol and consider neighboring symbols in the sequence of symbols.

    Abstract translation: 系统包括DPSK发射机和DPSK接收机。 DPSK发送器被配置为对信号进行编码,并将编码信号作为符号序列发送。 DPSK接收器被配置为将符号序列解码为比特值。 DPSK接收机还包括第一解码器,其被配置为接收符号的序列,并估计每个符号的外在信息,并将外部信息转发到第二解码器。 此外,如果从第二解码器接收的LLR的大小大于阈值,则第一解码器被配置为确定接收符号的比特值,而不考虑符号序列中的相邻符号。 此外,如果从第二解码器接收的LLR的大小不大于阈值,则第一解码器被配置为继续解码接收的符号并考虑符号序列中的相邻符号。

Patent Agency Ranking