Semiconductor integrated circuit
    121.
    发明申请
    Semiconductor integrated circuit 审中-公开
    半导体集成电路

    公开(公告)号:US20050140594A1

    公开(公告)日:2005-06-30

    申请号:US10955956

    申请日:2004-09-30

    申请人: Atsushi Ishikawa

    发明人: Atsushi Ishikawa

    IPC分类号: G09G3/30 G09G3/20 G09G3/22

    CPC分类号: G09G3/22 G09G3/2014

    摘要: A semiconductor integrated circuit is provided including first-group anode driving circuits each for outputting a first-group anode voltage to be supplied to first-group anodes that are placed next to each other; second-group anode driving circuits each for outputting a second-group anode voltage to be supplied to second-group anodes that are placed next to each other; and a plurality of selection circuits for, if a control signal is in a first state, inputting the plurality of pulse width modulation signals to the first-group anode driving circuits and inputting a predetermined voltage to the second-group anode driving circuits, and if a control signal is in a second state, inputting the plurality of pulse width modulation signals to the second-group anode driving circuits and inputting a predetermined voltage to the first-group anode driving circuits.

    摘要翻译: 提供了一种半导体集成电路,其包括:第一组阳极驱动电路,用于输出要供给到彼此相邻放置的第一组阳极的第一组阳极电压; 第二组阳极驱动电路,用于输出要供给到彼此相邻放置的第二组阳极的第二组阳极电压; 以及多个选择电路,如果控制信号处于第一状态,则将多个脉冲宽度调制信号输入到第一组阳极驱动电路并将预定电压输入到第二组阳极驱动电路,如果 控制信号处于第二状态,将多个脉宽调制信号输入到第二组阳极驱动电路,并将预定电压输入到第一组阳极驱动电路。

    Mold clamping control device capable of accurately controlling mold clamping forces exerted on a mold during injection molding
    122.
    发明授权
    Mold clamping control device capable of accurately controlling mold clamping forces exerted on a mold during injection molding 失效
    模具夹紧控制装置能够精确地控制在注射成型期间施加在模具上的模具夹紧力

    公开(公告)号:US06840115B1

    公开(公告)日:2005-01-11

    申请号:US09466832

    申请日:1999-12-20

    申请人: Atsushi Ishikawa

    发明人: Atsushi Ishikawa

    摘要: Upon injection molding, a linear encoder detects a relative position between the movable platen and a fixed platen, and a strain sensor detects a mold clamping force. A mold clamping control unit has a target platen position value and a target mold clamping force value. The mold clamping control unit subtracts a platen position and a mold clamping force from the target platen position value and the target mold clamping force value, respectively, to obtain deviations. The mold clamping control unit then switches the target to be controlled between the platen position and the mold clamping force. The mold clamping control unit appropriately converts the deviation of either the platen position or the mold clamping force into a control command value for a motor. The converted value is supplied to a motor control unit. The motor control unit drivingly controls a mold clamping motor according to the control command.

    摘要翻译: 在注射成型时,线性编码器检测可动压板和固定压板之间的相对位置,并且应变传感器检测模具夹紧力。 模具夹紧控制单元具有目标压板位置值和目标模具夹紧力值。 模具夹紧控制单元分别从目标压板位置值和目标模具夹紧力值中减去压板位置和模具夹紧力,以获得偏差。 然后,合模控制单元将待控制的目标切换到压板位置和合模力之间。 模具夹紧控制单元适当地将压板位置或合模力的偏差转换成用于电动机的控制命令值。 转换后的值被提供给电机控制单元。 电机控制单元根据控制命令驱动地控制合模电机。

    Storage control unit with a volatile cache and a non-volatile backup cache for processing read and write requests
    123.
    发明授权
    Storage control unit with a volatile cache and a non-volatile backup cache for processing read and write requests 有权
    具有易失性缓存的存储控制单元和用于处理读取和写入请求的非易失性备份高速缓存

    公开(公告)号:US06799244B2

    公开(公告)日:2004-09-28

    申请号:US10313383

    申请日:2002-12-06

    IPC分类号: G06F1200

    摘要: A subsystem and a subsystem processing method are disclosed in which a storage control unit 2000 interposed between a plurality of disk units 3000 and a host computer 1000 has a nonvolatile cache 2400 for temporarily holding the read data/write data exchanged between the disk units 3000 and the host computer 1000. The management information for the user data in the cache 2400 is stored in both the in-cache management information area 2420 in the cache 2400 and the in-memory management information area 2221 in a volatile local memory 2210 accessible at high speed. Under normal conditions, the management information in the high speed in-memory management information area 2221 is accessed. At the time of a fault, on the other hand, the management information in the nonvolatile in-cache management information area 2420 is restored in the in-memory management information area 2221, thereby improving the access rate of the cache 2400.

    摘要翻译: 公开了一种子系统和子系统处理方法,其中插入在多个盘单元3000和主计算机1000之间的存储控制单元2000具有用于暂时保持在盘单元3000和盘单元3000之间交换的读数据/写数据的非易失性高速缓存2400 主机计算机1000.高速缓存2400中的用户数据的管理信息存储在高速缓存2400中的高速缓存管理信息区域2420和存储器管理信息区域2221中,可访问的易失性本地存储器2210中 速度。 在正常条件下,访问高速存储器内管理信息区域2221中的管理信息。 另一方面,在故障时,在存储器内管理信息区域2221中恢复非易失性高速缓存管理信息区域2420中的管理信息,从而提高高速缓存2400的访问速度。

    Image processing apparatus
    124.
    发明授权
    Image processing apparatus 失效
    图像处理装置

    公开(公告)号:US06674920B1

    公开(公告)日:2004-01-06

    申请号:US09323952

    申请日:1999-06-02

    申请人: Atsushi Ishikawa

    发明人: Atsushi Ishikawa

    IPC分类号: G06K932

    CPC分类号: G06T3/40

    摘要: An image processing apparatus which outputs image data by electrically scaling an image in synchronism with a prescribed clock includes a memory with a one-line capacity for storing image data. A write address in the memory is initialized on a page by page basis and is incremented in accordance with a specified magnification ratio and with the position of a specified region, while a read address in the memory is initialized on a page by page basis and is incremented in accordance with the specified. magnification ratio and with the position of a specified region. The incrementing of the read address is started with a delay of one line with respect to the write address, with provisions made to generate an equal number of write addresses and read addresses per line. This makes scaling and translational transformations in the main scanning direction possible while allowing memory write and read operations to be performed simultaneously with a memory capacity of only one line.

    摘要翻译: 通过以规定的时钟同步地对图像进行电子缩放来输出图像数据的图像处理装置包括具有用于存储图像数据的单行容量的存储器。 存储器中的写入地址逐页地初始化,并且根据指定的放大率和指定区域的位置递增,同时逐页地初始化存储器中的读取地址,并且是 按照规定递增。 放大率和指定区域的位置。 读地址的递增以相对于写地址的一行的延迟开始,其规定用于生成相同数量的写地址和每行读地址。 这使得主扫描方向上的缩放和平移变换成为可能,同时允许存储器写入和读取操作与仅一行的存储器容量同时执行。

    Bus controlling system
    125.
    发明授权

    公开(公告)号:US06480926B2

    公开(公告)日:2002-11-12

    申请号:US09991704

    申请日:2001-11-26

    IPC分类号: G06F1300

    摘要: In a system including a plurality of rotatable media type memory devices and disk array storage including in a redundant configuration a plurality of controllers each including a disk array control unit in which a plurality of SCSI bus coupling ports are individually coupled with respective ports of a plurality of host PCs/WSs via SCSI cables, the disk array control unit includes a function to logically transmit a bus operation such as a device or bus reset operation in an arbitrary one of the ports of the disk array storage to other ports. This makes it possible that the ports seems to be physically coupled in a daisy chain when viewed from the host PCs/WSs.

    Bus controlling system
    126.
    发明授权
    Bus controlling system 有权
    总线控制系统

    公开(公告)号:US06374322B1

    公开(公告)日:2002-04-16

    申请号:US09256177

    申请日:1999-02-24

    IPC分类号: G06F1300

    摘要: In a system including a plurality of rotatable media type memory devices and disk array storage including in a redundant configuration a plurality of controllers each including a disk array control unit in which a plurality of SCSI bus coupling ports are individually coupled with respective ports of a plurality of host PCs/WSs via SCSI cables, the disk array control unit includes a function to logically transmit a bus operation such as a device or bus reset operation in an arbitrary one of the ports of the disk array storage to other ports. This makes it possible that the ports seems to be physically coupled in a daisy chain when viewed from the host PCs/WSs.

    摘要翻译: 在包括多个可旋转介质型存储装置和包括冗余配置的磁盘阵列存储器的系统中,多个控制器包括磁盘阵列控制单元,其中多个SCSI总线耦合端口与多个SCSI总线耦合端口的各个端口单独耦合 通过SCSI电缆的主机PC / WS,磁盘阵列控制单元包括逻辑地将诸如磁盘阵列存储器的任意一个端口中的设备或总线复位操作的总线操作传送到其他端口的功能。 这使得当从主机PC / WS观察时端口似乎被物理耦合在菊花链中。

    Storage sub-system having expanded data read
    127.
    发明授权
    Storage sub-system having expanded data read 有权
    具有扩展数据读取的存储子系统

    公开(公告)号:US06374269B1

    公开(公告)日:2002-04-16

    申请号:US09236443

    申请日:1999-01-25

    IPC分类号: G06F1730

    摘要: A storage sub-system employs a staging control information table by which staging of data to be read and redundant data thereof can be executed together to reduce response time in the event of a data read failure. The staging control information table also permits pre-read staging to be executed in the forward, backward or both the forward and backward directions, to reduce response time.

    摘要翻译: 存储子系统采用分段控制信息表,通过该分级控制信息表,可以一起执行要读取的数据的分段和其冗余数据,以在数据读取失败的情况下减少响应时间。 分段控制信息表还允许在前向,后向或向前和向后两个方向执行预读分阶段,以减少响应时间。