公开(公告)号：US07683399B2

公开(公告)日：2010-03-23

申请号：US11758304

申请日：2007-06-05

申请人： Hidetoshi Ishida ,  Tsuyoshi Tanaka ,  Daisuke Ueda

发明人： Hidetoshi Ishida ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC分类号： H01L31/0328

CPC分类号： H01L29/7787 ,  H01L29/045 ,  H01L29/0891 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/432 ,  H01L29/452

摘要： There is provided a normally-off type transistor made of a nitride semiconductor. The transistor includes; an undoped GaN layer which forms a channel region; an undoped Al0.2Ga0.8N layer which is formed on the undoped GaN layer and has a band gap larger than that of the undoped GaN layer; a p-type Al0.2Ga0.8N control layer which is formed on the undoped Al0.2Ga0.8N layer, has a p-type conductivity and forms a control region; an Ni gate electrode which contacts with the p-type Al0.2Ga0.8N control layer; a Ti/Al source electrode and a Ti/Al drain electrode which are formed beside the p-type Al0.2Ga0.8N control layer; and an Ni ohmic electrode which is connected to the undoped GaN layer and serves as a hole absorbing electrode. With this transistor, it is possible to achieve a large-current operation and a high switching speed.

摘要翻译： 提供了由氮化物半导体制成的常关型晶体管。 晶体管包括： 形成沟道区的未掺杂GaN层; 未掺杂的Al0.2Ga0.8N层，其形成在未掺杂的GaN层上，并且具有比未掺杂的GaN层的带隙大的带隙; 形成在未掺杂的Al0.2Ga0.8N层上的p型Al0.2Ga0.8N控制层具有p型导电性并形成控制区; 与p型Al0.2Ga0.8N控制层接触的Ni栅电极; 形成在p型Al0.2Ga0.8N控制层旁边的Ti / Al源电极和Ti / Al漏电极; 以及连接到未掺杂的GaN层并用作空穴吸收电极的Ni欧姆电极。 利用该晶体管，可以实现大电流动作和高切换速度。

公开(公告)号：US07663161B2

公开(公告)日：2010-02-16

申请号：US11939899

申请日：2007-11-14

申请人： Kazuhiro Kaibara ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

发明人： Kazuhiro Kaibara ,  Masahiro Hikita ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka

IPC分类号： H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L29/739 ,  H01L29/732 ,  H01L29/22 ,  H01L33/00 ,  H01L29/06

CPC分类号： H01L29/7787 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/432

摘要： A transistor includes: a first semiconductor layer and a second semiconductor layer with a first region and a second region, which are sequentially formed above a substrate; a first p-type semiconductor layer formed on a region of the second semiconductor layer other than the first and second regions; and a second p-type semiconductor layer formed on the first p-type semiconductor layer. The first p-type semiconductor layer is separated from a drain electrode by interposing therebetween a first groove having a bottom composed of the first region, and from a source electrode by interposing therebetween a second groove having a bottom composed of the second region.

摘要翻译： 晶体管包括：第一半导体层和具有第一区域和第二区域的第二半导体层，其顺序地形成在衬底上; 形成在除了第一和第二区域之外的第二半导体层的区域上的第一p型半导体层; 以及形成在第一p型半导体层上的第二p型半导体层。 第一p型半导体层与漏电极分离，其间具有由第一区域构成的底部的第一沟槽和源极电极之间插入具有由第二区域构成的底部的第二沟槽。

公开(公告)号：US07603214B2

公开(公告)日：2009-10-13

申请号：US11432530

申请日：2006-05-12

申请人： Tsuyoshi Tanaka ,  Yasushi Ishiai

发明人： Tsuyoshi Tanaka ,  Yasushi Ishiai

IPC分类号： G05G1/02 ,  G05G1/08

CPC分类号： B60K37/06 ,  B60K2350/928 ,  G02B27/01

摘要： An in-vehicle input unit is provided which includes: a head-up display which projects a hierarchical menu for operating a plurality of pieces of in-vehicle equipment onto a windshield in front of a driver's seat, and displays the hierarchical menu as a virtual image ahead of the windshield; and a plurality of switches which are disposed in a steering wheel so that several switches adjoin and surround one central switch, in which the head-up display displays selection items on the hierarchical menu as the virtual image so that the selection items correspond one to one to the plurality of switches disposed in the steering wheel.

摘要翻译： 提供一种车载输入单元，其包括：平视显示器，其将用于操作多个车载设备的分层菜单投射到驾驶员座椅前方的挡风玻璃上，并将该分层菜单显示为虚拟 挡风玻璃前方的图像; 以及多个开关，其设置在方向盘中，使得几个开关邻接并围绕一个中央开关，其中平视显示器将分层菜单上的选择项目显示为虚拟图像，使得选择项目对应于一对一 到设置在方向盘中的多个开关。

公开(公告)号：US07577770B2

公开(公告)日：2009-08-18

申请号：US11771397

申请日：2007-06-29

申请人： Tsuyoshi Tanaka ,  Yoshiki Murakami

发明人： Tsuyoshi Tanaka ,  Yoshiki Murakami

IPC分类号： G06F3/00

CPC分类号： G06F11/3419 ,  G06F11/3466 ,  G06F2201/87 ,  G06F2201/88

摘要： A judgment is made quickly about whether or not it is a memory or a chipset that is causing a performance bottleneck in an application program. A computer system of this invention includes at least one CPU, a controller that connects the CPU to a memory and to an I/O interface, in which the controller includes a response time measuring unit, which receives a request to access the memory and measures a response time taken to respond to the memory access request, a frequency counting unit, which measures an issue count of the memory access request, a measurement result storing unit, which stores a measurement result associating the response time with the corresponding issue count, and a measurement result control unit which outputs the measurement result stored in the measurement result storing unit when receiving a measurement result read request.

摘要翻译： 快速判断是否是在应用程序中导致性能瓶颈的存储器或芯片组。 本发明的计算机系统包括至少一个CPU，将CPU连接到存储器和I / O接口的控制器，其中控制器包括响应时间测量单元，其接收访问存储器的请求并测量 对存储器访问请求进行响应的响应时间;测量存储器访问请求的发行次数的频率计数单元;存储将响应时间与相应发行次数相关联的测量结果的测量结果存储单元;以及 测量结果控制单元，当接收到测量结果读取请求时，输出存储在测量结果存储单元中的测量结果。

公开(公告)号：US07528673B2

公开(公告)日：2009-05-05

申请号：US11225451

申请日：2005-09-13

申请人： Akihisa Shibuya ,  Koji Tsukamoto ,  Yasuhide Shimizu ,  Tsuyoshi Tanaka

发明人： Akihisa Shibuya ,  Koji Tsukamoto ,  Yasuhide Shimizu ,  Tsuyoshi Tanaka

IPC分类号： H03K3/26

CPC分类号： H03L7/02

摘要： An oscillator circuit having a closed loop connection, including: an oscillator for generating an output signal oscillating at a frequency corresponding to a control signal; a frequency/voltage converter for generating a detection signal having a voltage corresponding to a frequency of the output signal; a difference detector for generating a difference signal indicating a difference between the detection signal and a reference signal; and an integrator for generating the control signal by integrating the difference signal.

摘要翻译： 一种具有闭环连接的振荡器电路，包括：振荡器，用于产生以对应于控制信号的频率振荡的输出信号; 用于产生具有与输出信号的频率对应的电压的检测信号的频率/电压转换器; 差分检测器，用于产生指示检测信号和参考信号之间的差的差信号; 以及积分器，用于通过积分差分信号来产生控制信号。

公开(公告)号：US07528423B2

公开(公告)日：2009-05-05

申请号：US11681408

申请日：2007-03-02

申请人： Hiroaki Ueno ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Daisuke Ueda ,  Tsuyoshi Tanaka ,  Manabu Yanagihara ,  Yutaka Hirose ,  Masahiro Hikita

发明人： Hiroaki Ueno ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Daisuke Ueda ,  Tsuyoshi Tanaka ,  Manabu Yanagihara ,  Yutaka Hirose ,  Masahiro Hikita

IPC分类号： H01L31/072 ,  H01L31/109

CPC分类号： H01L29/7786 ,  H01L29/2003

摘要： It is an object of the present invention to provide a semiconductor device, which can simultaneously achieve a normally-off mode of HFET and an improvement in Imax, and further achieve an improvement in gm and a reduction in gate leakage current. In order to keep a thin barrier layer 13 on an operation layer 12 of a substrate 11 directly under a gate electrode for mostly contributing to achieve the normally-off mode and also implement the high Imax, it is configured in such a way that a thickness of the barrier layer 13 can be increased by the semiconductor layer 17 between gate and source regions and between gate and drain regions. It is therefore possible to achieve the normally-off mode and an improvement in Imax as compared with an FET in which a thickness of the barrier layer is designed so as to be uniform. An insulating film 18 with a dielectric constant higher than that of the barrier layer is further inserted between a gate electrode 16 and the barrier layers 13, so that an improvement in gm and a reduction in gate leakage current can be achieved.

摘要翻译： 本发明的一个目的是提供一种可以同时实现HFET的常闭模式和改进Imax的半导体器件，并进一步实现gm的改善和栅极漏电流的减小。 为了在栅电极正下方的基板11的操作层12上保持薄的阻挡层13，主要用于实现常关模式并且还实现了高的Imax，它被配置成使得厚度 可以通过栅极和源极区域之间以及栅极和漏极区域之间的半导体层17来增加阻挡层13。 因此，与设置阻挡层的厚度均匀的FET相比，可以实现常闭模式和Imax的改善。 介电常数高于阻挡层的绝缘膜18进一步插入在栅电极16和阻挡层13之间，从而可以实现gm的改善和栅极漏电流的减小。

公开(公告)号：US20090106811A1

公开(公告)日：2009-04-23

申请号：US12203493

申请日：2008-09-03

申请人： Tetsujiro KONDO ,  Yoshinori Watanabe ,  Tsuyoshi Tanaka ,  Takuro Ema ,  Yusuke Akiwa

发明人： Tetsujiro KONDO ,  Yoshinori Watanabe ,  Tsuyoshi Tanaka ,  Takuro Ema ,  Yusuke Akiwa

IPC分类号： H04N7/173

CPC分类号： H04N7/163 ,  H04N21/23424 ,  H04N21/4263 ,  H04N21/4383 ,  H04N21/439 ,  H04N21/44016

摘要： Disclosed is an information processing apparatus that includes an obtaining unit obtaining first contents and second contents, a storage storing the first contents and second contents obtained by the obtaining unit, and an information processor reading the first contents and second contents from the storage and outputting the second contents, while causing the second contents to precede the first contents a predetermined time, to be superimposed on the first contents.

摘要翻译： 公开了一种信息处理装置，其包括获取单元获取第一内容和第二内容，存储由获取单元获得的第一内容和第二内容的存储器，以及从存储器读取第一内容和第二内容的信息处理器， 第二内容，同时使第二内容在第一内容之前在预定时间之前被叠加在第一内容上。

公开(公告)号：US20090033795A1

公开(公告)日：2009-02-05

申请号：US12136328

申请日：2008-06-10

申请人： Tetsujiro Kondo ,  Yoshinori Watanabe ,  Tsuyoshi Tanaka ,  Takuro Ema ,  Yusuke Akiwa

发明人： Tetsujiro Kondo ,  Yoshinori Watanabe ,  Tsuyoshi Tanaka ,  Takuro Ema ,  Yusuke Akiwa

IPC分类号： H04N5/14

CPC分类号： H04N5/45 ,  H04N5/142 ,  H04N5/147 ,  H04N5/44591 ,  H04N21/4221 ,  H04N21/4263 ,  H04N21/4316 ,  H04N21/4348 ,  H04N21/44008 ,  H04N21/47217 ,  H04N21/482 ,  H04N21/4884 ,  H04N21/84

摘要： Disclosed is an image signal generating apparatus that includes a video information obtaining unit that obtains a plurality of video information, a characteristic information obtaining unit that obtains a plurality of predetermined characteristic information from each of the plurality of video information obtained by the video information obtaining unit, and a sorting unit that changes an order of displaying the plurality of the video information based on each of the plurality of characteristic information obtained from the characteristic information obtaining unit. The image signal generating apparatus further includes a display image signal generating unit that generates a video signal to display the plurality of video information based on information obtained, as a result of changing the order of displaying the plurality of the video information, from the sorting unit.

摘要翻译： 公开了一种图像信号生成装置，其具有获取多个视频信息的视频信息获取单元，从由视频信息获取单元获得的多个视频信息中的每一个获得多个预定特征信息的特征信息获取单元 以及分类单元，其基于从所述特征信息获取单元获得的所述多个特征信息中的每一个改变显示所述多个所述视频信息的顺序。 图像信号发生装置还包括显示图像信号生成单元，其基于从所述分类单元改变显示多个视频信息的顺序的结果，基于获得的信息来生成视频信号以显示多个视频信息 。

公开(公告)号：US07470958B2

公开(公告)日：2008-12-30

申请号：US11492913

申请日：2006-07-26

申请人： Yutaka Hirose ,  Tsuyoshi Tanaka

发明人： Yutaka Hirose ,  Tsuyoshi Tanaka

IPC分类号： H01L23/62

CPC分类号： H01L27/0255 ,  H01L27/0605 ,  H01L27/0629 ,  H01L29/2003

摘要： A semiconductor device includes a field effect transistor and a pn junction diode formed on a substrate. The field effect transistor has a source electrode, a drain electrode and a gate electrode formed on an element forming layer including a plurality of nitride semiconductor layers. The diode includes a p-type nitride semiconductor layer selectively formed on the element forming layer and an ohmic electrode, and has a pn junction formed between an n-type region of a two-dimensional electron gas generated on a heterojunction interface and a p-type region of the p-type nitride semiconductor layer. The diode is electrically connected to the gate electrode and forms a current path for allowing an excessive current caused in the gate electrode to pass.

摘要翻译： 半导体器件包括形成在衬底上的场效应晶体管和pn结二极管。 场效应晶体管具有形成在包括多个氮化物半导体层的元件形成层上的源电极，漏电极和栅电极。 二极管包括选择性地形成在元件形成层和欧姆电极上的p型氮化物半导体层，并且在异质结界面上产生的二维电子气的n型区域和p型结之间形成pn结， p型氮化物半导体层的类型区域。 二极管电连接到栅电极并形成用于允许在栅电极中引起的过大电流通过的电流路径。

公开(公告)号：US07465106B2

公开(公告)日：2008-12-16

申请号：US10560569

申请日：2004-06-28

申请人： Hiroki Ito ,  Tsuyoshi Tanaka ,  Toshiyuki Matsumoto

发明人： Hiroki Ito ,  Tsuyoshi Tanaka ,  Toshiyuki Matsumoto

IPC分类号： G02B6/36

CPC分类号： G02B6/4292 ,  G02B6/3818 ,  G02B6/3877 ,  G02B6/421

摘要： An optical receptacle includes: a fiber stub having a ferrule and an optical fiber in a through-hole of the ferrule; a holder to which an rear end of the fiber stub is fixed; and a sleeve for holding a plug ferrule in front of the fiber stub; wherein a grip ring is provided on an outer side face in which the fiber stub and the sleeve are overlapped to each other, whereby attaining the shortened optical receptacle, and improving connection loss due to tilting of the plug ferrule, and obtaining good repeatability of the connection loss.

摘要翻译： 光学插座包括：在套圈的通孔中具有套圈和光纤的光纤短截线; 固定有纤维束的后端的保持架; 以及用于在所述纤维束前面保持插头套圈的套筒; 其特征在于，在所述纤维束和所述套筒重叠的外侧面上设置有夹环，从而获得缩短的光插座，并且改善由于插头套圈的倾斜引起的连接损失，并获得良好的重复性 连接丢失。