公开(公告)号：US08525718B2

公开(公告)日：2013-09-03

申请号：US13410906

申请日：2012-03-02

Applicant: Kouhei Kudou ,  Yasuhide Shimizu ,  Norifumi Kanagawa ,  Shigemitsu Murayama

Inventor： Kouhei Kudou ,  Yasuhide Shimizu ,  Norifumi Kanagawa ,  Shigemitsu Murayama

IPC: H03M1/12

CPC classification number: H03F3/45192 ,  H03F2203/45138 ,  H03F2203/45644 ,  H03F2203/45652 ,  H03M1/142 ,  H03M1/365

Abstract: Disclosed herein is a differential amplifier including: an input terminal configured to receive an input signal; an output terminal configured to output an output signal obtained as a result of amplifying the input signal; an amplification part configured to amplify the input signal to generate the output signal; a load circuit which is connected between the amplification part and a power-supply terminal, and is provided with a first-conduction transistor, and a changeover switch configured to switch a connection between a gate electrode of the first-conduction transistor and a drain electrode of the first-conduction transistor to a connection between the gate electrode and the output terminal or vice versa; and a leak cancel switch configured to generate a leak cancel current for reducing an off leak current flowing through the changeover switch.

Abstract translation: 这里公开了一种差分放大器，包括：输入端子，被配置为接收输入信号; 输出端子，被配置为输出作为放大输入信号的结果而获得的输出信号; 放大部件，被配置为放大所述输入信号以产生所述输出信号; 负载电路，连接在放大部分和电源端子之间，并且设置有第一导体晶体管，以及转换开关，其被配置为切换第一导通晶体管的栅电极和漏极之间的连接 的第一导通晶体管连接到栅电极和输出端之间的连接，反之亦然; 以及泄漏取消开关，其被配置为产生用于减少流过所述切换开关的关闭泄漏电流的泄漏抵消电流。

公开(公告)号：US20120268300A1

公开(公告)日：2012-10-25

申请号：US13435178

申请日：2012-03-30

Applicant: Shinichirou Etou ,  Yasuhide Shimizu ,  Kouhei Kudou ,  Yukitoshi Yamashita

Inventor： Shinichirou Etou ,  Yasuhide Shimizu ,  Kouhei Kudou ,  Yukitoshi Yamashita

IPC: H03M1/12

CPC classification number: H03M1/1225 ,  H03M1/162

Abstract: An analog-to-digital (A/D) converter includes: a coarse A/D converter configured to convert, when converting an analog input signal into an N-bit digital signal, the analog input signal into a high-order m-bit digital signal; a fine A/D converter configured to convert the analog input signal into a low-order n-bit (where n=N−m) digital signal based on a conversion result of the coarse A/D converter; and a track-and-hold (TH) circuit configured to sample the analog input signal, to supply a comparison voltage compared with a coarse reference voltage to the coarse A/D converter, and to supply a comparison voltage compared with a fine reference voltage based on a conversion result of the fine A/D converter to the fine A/D converter. The TH circuit is configured to share a sampling capacitor in a selective input path for the analog input signal, the coarse reference voltage, and the fine reference voltage.

Abstract translation: 一种模数（A / D）转换器包括：粗A / D转换器，被配置为当将模拟输入信号转换为N位数字信号时，将模拟输入信号转换成高阶m位 数字信号; 配置为基于粗略A / D转换器的转换结果将模拟输入信号转换成低阶n位（其中n = N-m）数字信号的精细A / D转换器; 以及轨道保持（TH）电路，被配置为对所述模拟输入信号进行采样，以将与粗略A / D转换器的粗略参考电压相比较的比较电压提供给与比较电压相比较的精细参考电压 基于精细A / D转换器对精细A / D转换器的转换结果。 TH电路被配置为在模拟输入信号，粗参考电压和精细参考电压的选择输入路径中共享采样电容器。

公开(公告)号：US20090015451A1

公开(公告)日：2009-01-15

申请号：US12140803

申请日：2008-06-17

Applicant: Junji Toyomura ,  Yukitoshi Yamashita ,  Shogo Nakamura ,  Norifumi Kanagawa ,  Yasuhide Shimizu ,  Koichi Ono

Inventor： Junji Toyomura ,  Yukitoshi Yamashita ,  Shogo Nakamura ,  Norifumi Kanagawa ,  Yasuhide Shimizu ,  Koichi Ono

IPC: H03M1/12 ,  H03M1/34

CPC classification number: H03M1/0863 ,  H03F3/45188 ,  H03F2203/45302 ,  H03F2203/45396 ,  H03M1/205 ,  H03M1/365

Abstract: A flash A/D converter includes a reference voltage generator for generating a plurality of reference voltages, a first group of amplifiers having a plurality of amplifiers each of which amplifies a difference voltage between each reference voltage generated by the reference voltage generator and a voltage of an input signal, and a second group of amplifiers having a plurality of amplifiers. Each amplifier of the first group of amplifiers is a differential amplifier having a differential pair formed of a plurality of sets of cascode-connected transistors, and has a first switch for short-circuiting respective cascode connection portions of the plurality of transistors configuring the differential pair. Each amplifier of the second group of amplifiers is a differential amplifier having a differential pair formed of at least two transistors and has a second switch for short-circuiting a portion between input units of the differential pair. The first switch and the second switch are controlled to open and close by a control clock of a predetermined period.

Abstract translation: 闪光A / D转换器包括用于产生多个参考电压的参考电压发生器，具有多个放大器的第一组放大器，每个放大器放大由参考电压发生器产生的每个参考电压之间的差值电压和 输入信号和具有多个放大器的第二组放大器。 第一组放大器的每个放大器是具有由多组共源共栅连接的晶体管形成的差分对的差分放大器，并且具有第一开关，用于短路构成差分对的多个晶体管的各自的共源共栅连接部分 。 第二组放大器的每个放大器是具有由至少两个晶体管形成的差分对的差分放大器，并且具有用于使差分对的输入单元之间的部分短路的第二开关。 第一开关和第二开关通过预定周期的控制时钟被控制为打开和关闭。

公开(公告)号：US08692701B2

公开(公告)日：2014-04-08

申请号：US13599195

申请日：2012-08-30

Applicant: Shoji Kawahito ,  Sung Wook Jung ,  Osamu Kobayashi ,  Yasuhide Shimizu ,  Takahiro Miki ,  Takashi Morie ,  Hirotomo Ishii

Inventor： Shoji Kawahito ,  Sung Wook Jung ,  Osamu Kobayashi ,  Yasuhide Shimizu ,  Takahiro Miki ,  Takashi Morie ,  Hirotomo Ishii

IPC: H03M1/38

CPC classification number: H03M1/06 ,  H03M1/167

Abstract: A pipelined A/D converter circuit includes a sample hold circuit configured to sample and hold an analog input signal, and output a sample hold signal, and an A/D converter circuit including A/D converter circuit parts connected to each other in cascade, and performs A/D conversion in a pipelined form. The pipelined A/D converter circuit part of each stage includes a sub-A/D converter circuit, a multiplier D/A converter circuit, and a precharge circuit. The sub-A/D converter circuit includes comparators, and A/D convert the input signal into a digital signal of predetermined bits, a multiplier D/A converter circuit for D/A converting the digital signal from the sub-A/D converter circuit into an analog control signal generated with a reference voltage served as a reference value, sample, hold and amplify the input signal by sampling capacitors based on the analog control signal.

Abstract translation: 流水线A / D转换器电路包括：采样保持电路，被配置为采样和保持模拟输入信号，并输出采样保持信号;以及A / D转换器电路，包括级联地彼此连接的A / D转换器电路部分， 并以流水线形式执行A / D转换。 每级的流水线A / D转换器电路部分包括子A / D转换器电路，乘法器D / A转换器电路和预充电电路。 子A / D转换电路包括比较器，A / D将输入信号转换为预定位的数字信号; D / A转换器电路，用于对来自子A / D转换器的数字信号进行D / A转换 电路作为参考电压产生的模拟控制信号作为参考值，通过基于模拟控制信号的采样电容进行采样，保持和放大输入信号。

公开(公告)号：US20130057418A1

公开(公告)日：2013-03-07

申请号：US13599195

申请日：2012-08-30

Applicant: Shoji KAWAHITO ,  Sung Wook JUNG ,  Osamu KOBAYASHI ,  Yasuhide SHIMIZU ,  Takahiro MIKI ,  Takashi MORIE ,  Hirotomo ISHII

Inventor： Shoji KAWAHITO ,  Sung Wook JUNG ,  Osamu KOBAYASHI ,  Yasuhide SHIMIZU ,  Takahiro MIKI ,  Takashi MORIE ,  Hirotomo ISHII

IPC: H03M1/12

CPC classification number: H03M1/06 ,  H03M1/167

Abstract: A pipelined A/D converter circuit includes a sample hold circuit configured to sample and hold an analog input signal, and output a sample hold signal, and an A/D converter circuit including A/D converter circuit parts connected to each other in cascade, and performs A/D conversion in a pipelined form. The pipelined A/D converter circuit part of each stage includes a sub-A/D converter circuit, a multiplier D/A converter circuit, and a precharge circuit. The sub-A/D converter circuit includes comparators, and A/D convert the input signal into a digital signal of predetermined bits, a multiplier D/A converter circuit for D/A converting the digital signal from the sub-A/D converter circuit into an analog control signal generated with a reference voltage served as a reference value, sample, hold and amplify the input signal by sampling capacitors based on the analog control signal.

Abstract translation: 流水线A / D转换器电路包括：采样保持电路，被配置为采样和保持模拟输入信号，并输出采样保持信号;以及A / D转换器电路，包括级联地彼此连接的A / D转换器电路部分， 并以流水线形式执行A / D转换。 每级的流水线A / D转换器电路部分包括子A / D转换器电路，乘法器D / A转换器电路和预充电电路。 子A / D转换电路包括比较器，A / D将输入信号转换为预定位的数字信号; D / A转换器电路，用于对来自子A / D转换器的数字信号进行D / A转换 电路作为参考电压产生的模拟控制信号作为参考值，通过基于模拟控制信号的采样电容采样，保持和放大输入信号。

公开(公告)号：US08120388B2

公开(公告)日：2012-02-21

申请号：US11624270

申请日：2007-01-18

Applicant: Yasuhide Shimizu ,  Shigemitsu Murayama ,  Yukitoshi Yamashita ,  Junji Toyomura

Inventor： Yasuhide Shimizu ,  Shigemitsu Murayama ,  Yukitoshi Yamashita ,  Junji Toyomura

IPC: H03K5/22 ,  G11C27/02

CPC classification number: G11C27/024 ,  G11C27/026 ,  H03F3/45089 ,  H03F2203/45626 ,  H03F2203/45631 ,  H03F2203/45651 ,  H03F2203/45696 ,  H03F2203/45702 ,  H03F2203/45726 ,  H03K5/2481 ,  H03K5/249 ,  H03M1/142 ,  H03M1/206 ,  H03M1/365

Abstract: A comparator includes a sampling capacitor, a first switching unit which is connected to an input end of the sampling capacitor and which applies an input signal to the input end of the sampling capacitor, a second switching unit which is connected to the input end of the sampling capacitor and which applies a reference signal to the input end of the sampling capacitor, an output transistor connected to an output end of the sampling capacitor in a source follower connection manner or an emitter follower connection manner, and a third switching unit which is connected to an output end of the sampling capacitor and which maintains maintaining a voltage at the output end of the sampling capacitor to be constant. The input signal is compared with the reference signal.

Abstract translation: 比较器包括采样电容器，第一开关单元，其连接到采样电容器的输入端并将输入信号施加到采样电容器的输入端;第二开关单元，连接到采样电容器的输入端; 采样电容器，并且将采样电容器的输入端施加参考信号，以源极跟随器连接方式或射极跟随器连接方式连接到采样电容器的输出端的输出晶体管，以及连接到采样电容器的第三开关单元 到采样电容器的输出端，并且维持采样电容器输出端的电压保持恒定。 将输入信号与参考信号进行比较。

公开(公告)号：US08018368B2

公开(公告)日：2011-09-13

申请号：US12662025

申请日：2010-03-29

Applicant: Shigemitsu Murayama ,  Yasuhide Shimizu ,  Hiroaki Yatsuda ,  Kohei Kudo

Inventor： Shigemitsu Murayama ,  Yasuhide Shimizu ,  Hiroaki Yatsuda ,  Kohei Kudo

IPC: H03M1/12

CPC classification number: H03M1/004 ,  H03M1/0682 ,  H03M1/1215 ,  H03M1/147 ,  H03M1/365

Abstract: An analog to digital converter includes: a reference circuit adapted to generate reference voltages; differential amplifiers; normal phase circuits each of which samples a normal phase analog input signal and transfers a comparison voltage, obtained by comparison with a reference voltage generated by the reference circuit, to a first input terminal of one of the differential amplifiers when the input is differential and single-ended; and reversed phase circuits each of which samples a reversed phase analog input signal and transfers a comparison voltage, obtained by comparison with a reference voltage generated by the reference circuit, to a second input terminal of one of the differential amplifiers when the input is differential and which samples a ground level as a reference voltage of the reference circuit and supplies the reference voltage and comparison voltage to the second input terminal of the differential amplifier when the input is single-ended.

Abstract translation: 模数转换器包括：适于产生参考电压的参考电路; 差分放大器; 每个正常相电路对正相模拟输入信号进行采样，并将通过与参考电路产生的参考电压进行比较获得的比较电压传送到差分放大器之一的第一输入端，当输入为差分和单 接受 每个反相电路对反相模拟输入信号进行采样，并将通过与基准电路产生的参考电压进行比较而获得的比较电压传送到差分放大器之一的第二输入端，当输入为差分时， 其将接地电平作为参考电路的参考电压进行采样，并且当输入为单端时将参考电压和比较电压提供给差分放大器的第二输入端。

公开(公告)号：US07898449B2

公开(公告)日：2011-03-01

申请号：US12562664

申请日：2009-09-18

Applicant: Shoji Kawahito ,  Kazutaka Honda ,  Yasuhide Shimizu ,  Kuniyuki Tani ,  Akira Kurauchi ,  Koji Sushihara ,  Koichiro Mashiko

Inventor： Shoji Kawahito ,  Kazutaka Honda ,  Yasuhide Shimizu ,  Kuniyuki Tani ,  Akira Kurauchi ,  Koji Sushihara ,  Koichiro Mashiko

IPC: H03M1/12

CPC classification number: H03F3/45237 ,  H03F2203/45094 ,  H03F2203/45356 ,  H03F2203/45481 ,  H03F2203/45551

Abstract: A telescopic differential operational amplifier circuit for use in a pipelined A/D converter is provided with two auxiliary differential amplifiers connected to two cascode circuits, each including cascode-connected first to fourth transistors. During the sampling phase, first and second switches are turned on to apply a predetermined bias voltage to the gates of first and fourth transistors, and the input terminal of the differential operational amplifier circuit is set to a common mode voltage. During the hold phase, the first and second switches are turned off so that a voltage of each of the gates of the first and fourth transistors change to follow an input signal inputted via the input terminal with coupling capacitors operating as a level shifter of the input signal. Then the differential operational amplifier circuit performs push-pull operation operative only in a transconductance drive region, and is prevented from operating in a slewing region.

Abstract translation: 在流水线A / D转换器中使用的伸缩差分运算放大器电路设置有两个连接到两个共源共栅电路的辅助差分放大器，每个包括共源共栅连接的第一至第四晶体管。 在采样阶段期间，第一和第二开关导通以对第一和第四晶体管的栅极施加预定的偏置电压，并且差分运算放大器电路的输入端被设置为共模电压。 在保持阶段期间，第一和第二开关断开，使得第一和第四晶体管的每个栅极的电压改变为跟随经由输入端输入的输入信号，耦合电容器作为输入的电平转换器 信号。 然后，差分运算放大器电路仅在跨导驱动区域中执行推挽操作，并且防止在回转区域中操作。

公开(公告)号：US20100271244A1

公开(公告)日：2010-10-28

申请号：US12662025

申请日：2010-03-29

Applicant: Shigemitsu Murayama ,  Yasuhide Shimizu ,  Hiroaki Yatsuda ,  Kohei Kudo

Inventor： Shigemitsu Murayama ,  Yasuhide Shimizu ,  Hiroaki Yatsuda ,  Kohei Kudo

IPC: H03M1/12 ,  H03M3/00

CPC classification number: H03M1/004 ,  H03M1/0682 ,  H03M1/1215 ,  H03M1/147 ,  H03M1/365

Abstract: An analog to digital converter includes: a reference circuit adapted to generate reference voltages; differential amplifiers; normal phase circuits each of which samples a normal phase analog input signal and transfers a comparison voltage, obtained by comparison with a reference voltage generated by the reference circuit, to a first input terminal of one of the differential amplifiers when the input is differential and single-ended; and reversed phase circuits each of which samples a reversed phase analog input signal and transfers a comparison voltage, obtained by comparison with a reference voltage generated by the reference circuit, to a second input terminal of one of the differential amplifiers when the input is differential and which samples a ground level as a reference voltage of the reference circuit and supplies the reference voltage and comparison voltage to the second input terminal of the differential amplifier when the input is single-ended.

Abstract translation: 模数转换器包括：适于产生参考电压的参考电路; 差分放大器; 每个正常相电路对正相模拟输入信号进行采样，并将通过与参考电路产生的参考电压进行比较获得的比较电压传送到差分放大器之一的第一输入端，当输入为差分和单 接受 每个反相电路对反相模拟输入信号进行采样，并将通过与基准电路产生的参考电压进行比较而获得的比较电压传送到差分放大器之一的第二输入端，当输入为差分时， 其将接地电平作为参考电路的参考电压进行采样，并且当输入为单端时将参考电压和比较电压提供给差分放大器的第二输入端。

公开(公告)号：US20090073020A1

公开(公告)日：2009-03-19

申请号：US12230285

申请日：2008-08-27

Applicant: Yasuhide Shimizu ,  Shigemitsu Murayama ,  Kohei Kudo ,  Hiroaki Yatsuda

Inventor： Yasuhide Shimizu ,  Shigemitsu Murayama ,  Kohei Kudo ,  Hiroaki Yatsuda

IPC: H03M1/36 ,  H03F3/45

CPC classification number: H03F3/005 ,  H03M1/002 ,  H03M1/204 ,  H03M1/362

Abstract: A parallel type analog-to-digital conversion circuit, including a reference signal generating portion and a comparison amplification portion, the comparison amplification portion including a plurality of amplifiers, input resetting switches, first sampling capacitors, second sampling capacitors, first sampling switches, and second sampling switches.

Abstract translation: 一种并行型模拟 - 数字转换电路，包括参考信号产生部分和比较放大部分，比较放大部分包括多个放大器，输入复位开关，第一采样电容器，第二采样电容器，第一采样开关和 第二采样开关。