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公开(公告)号：US11038529B2
公开(公告)日：2021-06-15
申请号：US16659531
申请日：2019-10-21
发明人： Lochan Verma , Bin Tian , Sameer Vermani , Lin Yang , Jialing Li Chen
摘要： In some aspects, methods and apparatus for wireless communications are configured to generate a packet for wireless communication where the packet includes a mark symbol in a preamble of the packet where the mark symbol includes a signature or stamp field in the mark to provide protocol information that indicates the protocol of the packet, such as an 802.11 EHT packet. In some other aspects, a cyclic redundancy check field in the mark symbol may be manipulated in various ways to indicate the protocol of the packet in lieu of providing the signature or stamp field.
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122.发明授权公开(公告)号：US11029891B2
公开(公告)日：2021-06-08
申请号：US16181639
申请日：2018-11-06
摘要： Techniques are provided for storing data in a distributed storage system. A server stores an object according to a first storage policy in the distributed storage system that includes a plurality of storage nodes. Storing the object according to the first storage policy results in a first storage overhead for the object. The server receives a triggering event associated with the object, and the triggering event changes an attribute of the object. In response to the triggering event, the server identifies a second storage policy for the object. Storing the object according to the second storage policy results in a second storage overhead for the object different from the first storage overhead.
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123.发明授权公开(公告)号：US11025410B2
公开(公告)日：2021-06-01
申请号：US17092690
申请日：2020-11-09
发明人： Haizhen Zhuo
摘要： Disclosed herein are methods, systems, and apparatus, including computer programs encoded on computer storage media, for storing blockchain data. One method includes receiving a request from an application component of a blockchain node to execute one or more software instructions in a trusted execution environment (TEE); determining one or more blockchain node blocks for executing the one or more software instructions; performing error correction coding of the one or more blocks in the TEE to generate one or more encoded blocks; dividing each of the one or more encoded blocks into a plurality of datasets; selecting one or more datasets from each of the one or more encoded blocks; and hashing the one or more datasets to generate one or more hash values corresponding to the one or more datasets for use in replacing the one or more datasets to save storage space of the blockchain node.
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公开(公告)号：US11025281B2
公开(公告)日：2021-06-01
申请号：US16806322
申请日：2020-03-02
申请人： KIOXIA CORPORATION
发明人： Naoko Kifune , Hironori Uchikawa
摘要： A memory system includes a nonvolatile memory and a memory controller that encodes first XOR data generated by performing an exclusive OR operation on pieces of user data, wherein a value of each bit of the XOR data is generated by performing an exclusive OR operation on values of bits that are at one of a plurality of bit positions of a piece of user data, generates codewords by encoding the plurality of pieces of user data and the generated XOR data, respectively, and stores the codewords in the nonvolatile memory. The memory controller also performs a read operation by reading the codewords from the nonvolatile memory and decoding them. When the decoding of two or more of the codewords fails, the memory controller generates second XOR data, and corrects the value of one of the bits corresponding to a codeword whose decoding failed, based on the second XOR data.
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公开(公告)号：US11025280B2
公开(公告)日：2021-06-01
申请号：US16432597
申请日：2019-06-05
摘要： A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to perform a low-density parity check (LDPC) encoding on input bits using a parity check matrix to generate an LDPC codeword comprising information word bits and parity bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.
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126.发明授权公开(公告)号：US11023309B2
公开(公告)日：2021-06-01
申请号：US17076526
申请日：2020-10-21
发明人： Fuxi Deng
摘要： A method for blockchain-based transaction consensus processing is provided. Node devices in a blockchain include at least one primary node device and several secondary node devices, the primary node device fragments proposed transaction data into a specified number of data fragments based on an erasure code algorithm, and the method includes: receiving a data fragment of the transaction data that is sent by the primary node device in a unicast mode, where respective data fragments sent by the primary node device to individual node devices in a unicast mode are different from one another; broadcasting the received data fragment to other node devices in the blockchain, and receiving data fragments of the transaction data that are broadcast by the other node devices; determining whether the number of received data fragments of the transaction data reaches an erasure code recovery threshold; and if so, performing data recovery on the received data fragments based on an erasure code reconstruction algorithm to obtain original content of the transaction data, to complete consensus processing with respect to the original content of the transaction data.
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公开(公告)号：US20210160318A1
公开(公告)日：2021-05-27
申请号：US17147639
申请日：2021-01-13
申请人： Pure Storage, Inc.
发明人： Prabhath Sajeepa , Jayesh Patel , Taras Glek
IPC分类号： H04L29/08 , G06F3/06 , G11C29/52 , G06F12/02 , H04L12/933 , G06F11/20 , G06F11/10 , H03M13/15
摘要： A storage system that has blades and fabric modules connects to a customer legacy network that has a first, active switch and a second, passive switch. A first link aggregation group (LAG) is configured active and includes ports of the first, active switch that connect via links to the first and second fabric modules of the storage system. A second LAG is configured passive and includes ports of the second, passive switch that connect via links to the first and second fabric modules. A multi-chassis link aggregation group (MLAG, MCLAG or MC-LAG) is configured and includes ports of the first and second fabric modules that connect via links to the first and second switches.
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公开(公告)号：US11012098B2
公开(公告)日：2021-05-18
申请号：US16566195
申请日：2019-09-10
申请人： Saturn Licensing LLC
发明人： Ryoji Ikegaya , Makiko Yamamoto , Yuji Shinohara
IPC分类号： H03M13/27 , H04L1/00 , H03M13/11 , H03M13/03 , H03M13/29 , H03M13/25 , H03M13/35 , H03M13/15
摘要： The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 10/15 or 12/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.
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129.发明申请公开(公告)号：US20210143839A1
公开(公告)日：2021-05-13
申请号：US17154739
申请日：2021-01-21
申请人： Quantum Corporation
发明人： George Saliba
摘要： Example apparatus and methods control whether and when hybrid rateless Reed Solomon (RS) error correcting codes (ECC) for a message are produced, stored, and distributed. The control may be based on a property (e.g., reliability, error state, speed) of a message recipient. Example apparatus and methods may also control whether and when fountain codes for the message are produced, stored, and distributed. Once again, the control may be based on a property of a message or ECC recipient. Both the hybrid rateless RS ECC and the fountain codes may be produced from data stored in a modified RS matrix. The modified RS matrix may store row-centric error detection codes (EDC) instead of conventional cyclic redundancy check (CRC) characters. The modified RS matrix may store column-centric ECC that may be produced serially. Different types or numbers of ECC may be produced, stored, and provided for different messages stored at different recipients.
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公开(公告)号：US10990529B2
公开(公告)日：2021-04-27
申请号：US16601881
申请日：2019-10-15
发明人： Daniel Wu , Kai Chirca , Matthew David Pierson
IPC分类号： G06F12/0875 , G06F12/084 , G06F12/0811 , G06F12/1009 , G06F12/10 , G06F13/16 , G06F13/40 , G06F12/0855 , G06F12/06 , G06F12/0817 , G06F12/0831 , G06F13/12 , G06F3/06 , G06F12/0815 , H03M13/01 , H03M13/09 , H03M13/15 , H03M13/27 , G06F9/30 , G06F9/38 , G06F9/48 , G06F9/50 , G06F12/0891
摘要： Techniques for accessing data, comprising receiving a first memory request associated with a first clock domain, converting a first memory address of the first memory request from a first memory address format associated with the first clock domain to a second memory address format associated with the second clock domain, transitioning the first memory request to a second clock domain, creating a first scoreboard entry associated with the first memory request, transmitting the first memory request to a memory based on the converted first memory address, receiving a first response to the first memory request, transitioning the first response to the second clock domain and clearing the first scoreboard entry based on the received response.
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