-
公开(公告)号:US20200073823A1
公开(公告)日:2020-03-05
申请号:US16115511
申请日:2018-08-28
摘要: Performance of a data cache is controlled; the cache implements a garbage collection process for maintaining free storage blocks in a data store of the cache and an eviction policy for selecting data to be evicted from the cache. A cache performance control method defines a performance target for operation of the cache and, in operation of the cache, monitors performance of the cache in relation to the performance target. The garbage collection process is selectively performed in a relocation mode and an eviction mode so as to promote compliance with the performance target. In the relocation mode, data contained in a set of storage blocks selected for garbage collection is relocated in the data store. In the eviction mode, a set of storage blocks for garbage collection is selected in dependence on the eviction policy and data contained in each selected storage block is evicted from the cache.
-
公开(公告)号:US10552317B2
公开(公告)日:2020-02-04
申请号:US15091222
申请日:2016-04-05
发明人: Xiao-Yu Hu , Nikolas Ioannou , Ioannis Koltsidas
IPC分类号: G06F12/02 , G06F12/0871 , G06F12/0802
摘要: System and method for operating a solid state memory containing a memory space. The present invention provides a computerized system that includes a solid state memory having a memory space; a controller adapted to use a first portion of the memory space as a cache; and a garbage collector adapted to use a second portion of the memory space to collect garbage in the solid state memory. The controller is adapted to change a size of at least one of the first portion and the second portion of the memory space during operation of the solid state memory.
-
公开(公告)号:US10552063B2
公开(公告)日:2020-02-04
申请号:US16014909
申请日:2018-06-21
发明人: Nikolaos Papandreou , Sasa Tomic , Roman A. Pletka , Nikolas Ioannou , Charalampos Pozidis , Aaron D. Fry , Timothy Fisher
IPC分类号: G06F3/06
摘要: A controller of a non-volatile memory manages each of multiple disjoint sets of physical pages as a respective page group. The controller mitigates errors by repetitively performing background mitigation reads of each of the plurality of blocks including, in order, performing a background mitigation read of a first physical page in a first page group in a first block; prior to again performing a background mitigation read in the first block, performing a background mitigation read of a first physical page in a first page group in each other of the plurality of blocks; performing a background mitigation read of a first physical page in a second page group in the first block; and prior to again performing a background mitigation read in the first block, performing a background mitigation read of a first physical page in a second page group in each other of the plurality of blocks.
-
公开(公告)号:US20190391752A1
公开(公告)日:2019-12-26
申请号:US16014938
申请日:2018-06-21
发明人: Roman A. Pletka , Sasa Tomic , Nikolaos Papandreou , Nikolas Ioannou , Aaron D. Fry , Timothy Fisher
IPC分类号: G06F3/06
摘要: In at least one embodiment, a controller of a non-volatile memory having a plurality of blocks of physical memory estimates a current value of a block health metric of the particular block based on a previous value of the block health metric and a reference block wear curve. The controller assigns the particular block a health grade based on the estimated current value of the block health metric and performs data placement in the block in accordance with the assigned health grade. The controller may calibrate a set of read threshold voltages of the particular block prior to estimating the current value of the block health metric.
-
公开(公告)号:US10459839B1
公开(公告)日:2019-10-29
申请号:US15969355
申请日:2018-05-02
摘要: A controller of a non-volatile memory tracks identifiers of logical erase blocks (LEBs) for which programming has closed. A first subset of the closed LEBs tracks LEBs that are ineligible for selection for garbage collection, and a second subset of the closed LEBs tracks LEBs that are eligible for selection for garbage collection. The controller continuously migrates closed LEBs from the first subset to the second subset over time. In response to closing a particular LEB, the controller places an identifier of the particular LEB into one of the first and second subsets selected based on a first amount of dummy data programmed into the closed LEBs tracked in the first subset. Thereafter, in response to selection of the particular LEB for garbage collection, the controller performs garbage collection on the particular LEB.
-
公开(公告)号:US10365859B2
公开(公告)日:2019-07-30
申请号:US14520034
申请日:2014-10-21
发明人: Charles J. Camp , Timothy J. Fisher , Aaron D. Fry , Nikolas Ioannou , Roman A. Pletka , Lincoln T. Simmons , Sasa Tomic
摘要: In at least one embodiment, a controller of a non-volatile memory array iteratively performs a merged background management process independently of any host system's demand requests targeting the memory array. During an iteration of the merged background management process, the controller performs a read sweep by reading data from each of a plurality of page groups within the memory array and recording page group error statistics regarding errors detected by the reading for each page group, where each page group is formed of a respective set of one or more physical pages of storage in the memory array. During the iteration of the merged background management process, the controller employs the page group error statistics recorded during the read sweep in another background management function.
-
公开(公告)号:US20190213124A1
公开(公告)日:2019-07-11
申请号:US16358176
申请日:2019-03-19
发明人: Charles J. Camp , Timothy J. Fisher , Aaron D. Fry , Nikolas Ioannou , Ioannis Koltsidas , Roman A. Pletka , Sasa Tomic
IPC分类号: G06F12/02
CPC分类号: G06F12/0261 , G06F12/0246 , G06F2212/1036 , G06F2212/7205 , G06F2212/7208
摘要: An apparatus, according to one embodiment, includes non-volatile memory configured to store data, and a controller and logic integrated with and/or executable by the controller, the logic being configured to: determine, by the controller, that at least one block of the non-volatile memory and/or portion of a block of the non-volatile memory meets a retirement condition, re-evaluate, by the controller, the at least one block and/or the portion of a block to determine whether to retire the at least one block and/or the portion of a block, indicate, by the controller, that the at least one block and/or the portion of a block remains usable when a result of the re-evaluation is not to retire the block, and indicate, by the controller, that the at least one block and/or the portion of a block is retired when the result of the re-evaluation is to retire the block.
-
138.
公开(公告)号:US10222998B2
公开(公告)日:2019-03-05
申请号:US15804975
申请日:2017-11-06
发明人: Charles J. Camp , Timothy J. Fisher , Aaron D. Fry , Nikolas Ioannou , Ioannis Koltsidas , Nikolaos Papandreou , Thomas Parnell , Roman A. Pletka , Charalampos Pozidis , Sasa Tomic
摘要: In one embodiment, a computer program product includes a computer readable storage medium having program instructions embodied therewith. The program instructions are executable by a processing circuit to cause the processing circuit to perform a method that includes determining, after writing data to a non-volatile memory block, one or more delta threshold voltage shift (TVSΔ) values. One or more overall threshold voltage shift values is calculated for the data written to the non-volatile memory block. The one or more overall threshold voltage shift values are stored. The method also includes reading one or more TVS values from a non-volatile controller memory, and resetting a program/erase cycle count since last calibration after calibrating the one or more overall threshold voltage shift values. The one or more TVSΔ values and the program/erase cycle count since last calibration are stored to the non-volatile controller memory.
-
139.
公开(公告)号:US10222997B2
公开(公告)日:2019-03-05
申请号:US15804933
申请日:2017-11-06
发明人: Charles J. Camp , Timothy J. Fisher , Aaron D. Fry , Nikolas Ioannou , Ioannis Koltsidas , Nikolaos Papandreou , Thomas Parnell , Roman A. Pletka , Charalampos Pozidis , Sasa Tomic
摘要: A computer program product according to one embodiment includes a computer readable storage medium having program instructions embodied therewith. The program instructions are executable by a processing circuit to cause the circuitry to perform a method including determining, after writing data to a non-volatile memory block, one or more delta threshold voltage shift (TVSΔ) values. One or more overall threshold voltage shift values for the data written to the non-volatile memory block are calculated, the values being a function of the one or more TVSΔ values to be used when writing data to the non-volatile memory block. The overall threshold voltage shift values are stored. A base threshold voltage shift (TVSBASE) value, the one or more TVSΔ values, or both the TVSBASE value and the one or more TVSΔ values are re-calibrated during a background health check after a predetermined number of background health checks without calibration are performed.
-
140.
公开(公告)号:US20180314630A1
公开(公告)日:2018-11-01
申请号:US16020871
申请日:2018-06-27
发明人: Charles J. Camp , Timothy J. Fisher , Aaron D. Fry , Nikolas Ioannou , Ioannis Koltsidas , Roman A. Pletka , Sasa Tomic
IPC分类号: G06F12/02
CPC分类号: G06F12/0246 , G06F2212/452 , G06F2212/7208 , G06F2212/7211
摘要: A computer program product, according to one embodiment, includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. Moreover, the program instructions are readable and/or executable by a controller to cause the controller to perform a method which includes: assigning data having a first heat to a first data stream, assigning data having a second heat to a second data stream, and writing the data streams simultaneously, in parallel, to page-stripes having a same index across a series of planes of memory. The writing of the first data stream begins at an opposite end of the series of planes as the writing of the second data stream, the writing of the streams being toward one another. Other systems, methods, and computer program products are described in additional embodiments.
-
-
-
-
-
-
-
-
-