Abstract:
A high TCR tungsten resistor on a reverse biased Schottky diode. A high TCR tungsten resistor on an unsilicided polysilicon platform geometry. A high TCR tungsten resistor between two parallel polysilicon leads on remaining contact etch stop dielectric. A high TCR tungsten resistor embedded in a intermetal dielectric layer above a lower interconnect layer and below an upper interconnect layer. A method of forming a high TCR tungsten resistor on a reverse biased Schottky diode. A method of forming high TCR tungsten resistor on an unsilicided polysilicon platform geometry. A method of forming high TCR tungsten resistor between two parallel polysilicon leads on remaining contact etch stop dielectric. A method of forming high TCR tungsten resistor embedded in a inter metal dielectric layer above a lower interconnect layer and below an upper interconnect layer.
Abstract:
Isolation circuits for digital communications and methods to provide isolation for digital communications are disclosed. An example isolation circuit includes an isolation barrier, a burst encoder in a first circuit, and an edge pattern detector in a second circuit. The example isolation barrier electrically isolates the first circuit from the second circuit. The example burst encoder generates a first pattern in response to receiving a rising edge on an input signal and generates a second pattern in response to receiving a falling edge on the input signal. The example edge pattern detector detects the first pattern or the second pattern received from the burst encoder via the isolation barrier, sets an output signal at a first signal level in response to detecting the first pattern, and sets the output signal at a second signal level in response to detecting the second pattern.
Abstract:
An apparatus is provided. Transmission line cells are formed in a first region. A first metallization layer is formed over the transmission line cells within a portion of the first region. At least a portion of the first metallization layer is electrically coupled to the plurality of transmission line cells. A second metallization layer is formed over the first metallization layer with an interconnect portion, and overlay portion, and a first balun. The interconnect portion at least partially extends into the first region, and the overlay portion is within the first region. The first balun winding is electrically coupled to the overlay portion and partially extends into a second region. The first region partially surrounds the second region. A third metallization layer is formed over the second metallization layer having a second balun winding within the second region, where the second winding is generally coaxial with the first balun winding.
Abstract:
Data transfer devices and methods for transferring data between first and second circuits are disclosed. A data transfer device includes a first circuit having a plurality of data channels, wherein at least one of the data channels is an active data channel. A serializer has a plurality of inputs and an output, wherein the inputs are coupled to the plurality of data channels. The serializer is for coupling only one active channel at a time to the output. An isolation barrier is coupled to the output of the serializer, the isolation attenuates transients and passes the fundamental frequency. A second circuit includes a deserializer having an input and at least one output, the input is coupled to the isolation barrier, the at least one output is at least one active data channel.
Abstract:
In a first inductive structure, a first data coil includes: a first portion for conducting a first common mode current in a first direction; and a second portion for conducting a second common mode current in a second direction opposite the first direction. The first and second portions of the first data coil are connected at a first node. In a second inductive structure, a second data coil includes: a first portion for conducting a third common mode current in the first direction; and a second portion for conducting a fourth common mode current in the second direction. The first and second portions of the second data coil are connected at a second node galvanically isolated from the first node. The first, second, third and fourth common mode currents are induced by a common mode transient.