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公开(公告)号：US10355592B2
公开(公告)日：2019-07-16
申请号：US15709497
申请日：2017-09-20
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Ranjit Kumar Dash , Keith Edmund Kunz
Abstract: Methods and apparatus for detecting a zero inductor current to control switch transitions for a power converter. An example method includes outputting a first voltage and a first current, receiving the first voltage and output a second voltage into an input of a comparator, when the second voltage is above a third voltage, outputting a first output voltage, when the second voltage is below the third voltage, outputting a second output voltage, determining when the first current is zero based the output of the comparator, enabling a set of switches based on when the first current is zero.
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公开(公告)号：US20180041130A1
公开(公告)日：2018-02-08
申请号：US15669345
申请日：2017-08-04
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Keith Edmund Kunz , Anant Kamath , Maurizio Granato , Prajkta Vyavahare
CPC classification number: H02M3/33507 , H02M1/32 , H02M3/33523
Abstract: Methods and systems for providing electrical power using an isolated DC-DC converter, including the actions of: a) providing current to a primary side of a transformer at multiple predetermined open loop current levels using a power supply, said power supply providing said open loop current levels in increasing amplitude order and at predetermined times, said open loop current levels and times being selected to ramp a voltage across output terminals connected to a secondary side of said transformer so that after said power supply provides a maximum one of said open loop current levels, said voltage reaches a threshold sufficient to enable a closed loop controller connected to said output terminals to send a feedback signal to said primary side, said threshold being insufficient to fully power said output terminals; and b) sending said feedback signal to said primary side using said closed loop controller when said voltage reaches said threshold, said power supply controlled in response to said feedback signal to continue providing current to said primary side at closed loop current levels, said feedback signal selected to control said power supply to increase said closed loop current levels until said output terminals are fully powered.
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公开(公告)号：US10903746B2
公开(公告)日：2021-01-26
申请号：US15669345
申请日：2017-08-04
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Keith Edmund Kunz , Anant Kamath , Maurizio Granato , Prajkta Vyavahare
Abstract: Methods and systems for providing electrical power using an isolated DC-DC converter include: using a power supply to provide multiple amplitudes of open loop current to a primary side of a transformer. The amplitudes are selected to increase stepwise, at predetermined times, to ramp a voltage across output terminals connected to a secondary side of said transformer so that after said power supply provides a maximum open loop current amplitude, said voltage reaches a threshold sufficient to enable a closed loop controller connected to said output terminals to send a feedback signal to said primary side. The threshold voltage is insufficient to fully power said output terminals. The feedback signal is selected to control said power supply to increase current to said primary side at closed loop current levels until said output terminals are fully powered.
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公开(公告)号：US10461075B2
公开(公告)日：2019-10-29
申请号：US14864538
申请日：2015-09-24
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Russell Carlton McMullan , Binu Kamblath Pushkarakshan , Subramanian J. Narayan , Swaminathan Sankaran , Keith Edmund Kunz
IPC: H01L23/522 , H01L27/06 , H01L49/02 , H01L27/08 , H01L29/66 , H01L29/872
Abstract: A high TCR tungsten resistor on a reverse biased Schottky diode. A high TCR tungsten resistor on an unsilicided polysilicon platform geometry. A high TCR tungsten resistor between two parallel polysilicon leads on remaining contact etch stop dielectric. A high TCR tungsten resistor embedded in a intermetal dielectric layer above a lower interconnect layer and below an upper interconnect layer. A method of forming a high TCR tungsten resistor on a reverse biased Schottky diode. A method of forming high TCR tungsten resistor on an unsilicided polysilicon platform geometry. A method of forming high TCR tungsten resistor between two parallel polysilicon leads on remaining contact etch stop dielectric. A method of forming high TCR tungsten resistor embedded in a inter metal dielectric layer above a lower interconnect layer and below an upper interconnect layer.
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公开(公告)号：US09985018B2
公开(公告)日：2018-05-29
申请号：US14864504
申请日：2015-09-24
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Russell Carlton McMullan , Binu Kamblath Pushkarakshan , Subramanian J. Narayan , Swaminathan Sankaran , Keith Edmund Kunz
IPC: H01L49/02 , H01L27/06 , H01L27/08 , H01L29/66 , H01L29/872
CPC classification number: H01L27/0676 , H01L27/0629 , H01L27/0802 , H01L28/24 , H01L29/66143 , H01L29/8725
Abstract: A high TCR tungsten resistor on a reverse biased Schottky diode. A high TCR tungsten resistor on an unsilicided polysilicon platform geometry. A high TCR tungsten resistor between two parallel polysilicon leads on remaining contact etch stop dielectric. A high TCR tungsten resistor embedded in a intermetal dielectric layer above a lower interconnect layer and below an upper interconnect layer. A method of forming a high TCR tungsten resistor on a reverse biased Schottky diode. A method of forming high TCR tungsten resistor on an unsilicided polysilicon platform geometry. A method of forming high TCR tungsten resistor between two parallel polysilicon leads on remaining contact etch stop dielectric. A method of forming high TCR tungsten resistor embedded in a inter metal dielectric layer above a lower interconnect layer and below an upper interconnect layer.
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Patent Agency Ranking
公开(公告)号：US09812960B2
公开(公告)日：2017-11-07
申请号：US14983227
申请日：2015-12-29
Applicant: Texas Instruments Incorporated
Inventor： Keith Edmund Kunz , Vipul Kumar Singhal , Rajat Chauhan , Per Torstein Røine , Danielle Griffith
CPC classification number: H02M3/158 , H02M3/156 , H02M2001/0032 , H02M2003/1566 , Y02B70/16
Abstract: Methods and apparatus for DC-DC power controller with low standby current and fast transient response. In an example arrangement, an apparatus includes a voltage converter outputting a direct current output voltage, configured to increase the output voltage responsive to an enable control signal; at least one feedback comparator configured to output a first control signal, the feedback comparator being active responsive to an edge at a clock signal input; an adjustable frequency oscillator for outputting a first clock signal; and a fast transient detect circuit configured to output a second signal asynchronously upon detecting a rapid change greater than a voltage threshold in the output voltage; the voltage converter receiving the enable control signal when either the first clock signal is active, or the second signal is active and the output voltage is less than a reference voltage. Additional apparatus and methods are disclosed.
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公开(公告)号：US20170187286A1
公开(公告)日：2017-06-29
申请号：US14983227
申请日：2015-12-29
Applicant: Texas Instruments Incorporated
Inventor： Keith Edmund Kunz , Vipul Kumar Singhal , Rajat Chauhan , Per Torstein Røine , Danielle Griffith
IPC: H02M3/158
CPC classification number: H02M3/158 , H02M3/156 , H02M2001/0032 , H02M2003/1566 , Y02B70/16
Abstract: Methods and apparatus for DC-DC power controller with low standby current and fast transient response. In an example arrangement, an apparatus includes a voltage converter outputting a direct current output voltage, configured to increase the output voltage responsive to an enable control signal; at least one feedback comparator configured to output a first control signal, the feedback comparator being active responsive to an edge at a clock signal input; an adjustable frequency oscillator for outputting a first clock signal; and a fast transient detect circuit configured to output a second signal asynchronously upon detecting a rapid change greater than a voltage threshold in the output voltage; the voltage converter receiving the enable control signal when either the first clock signal is active, or the second signal is active and the output voltage is less than a reference voltage. Additional apparatus and methods are disclosed.
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8.发明授权公开(公告)号：US09692296B1
公开(公告)日：2017-06-27
申请号：US15043255
申请日：2016-02-12
Applicant: Texas Instruments Incorporated
Inventor： Ranjit Kumar Dash , Keith Edmund Kunz
CPC classification number: H02M3/04 , H02M3/156 , H02M3/158 , H02M3/1588 , H02M2001/009
Abstract: Single-input-multiple-output (SIMO) DC-DC converters and SIMO DC-DC converter control circuits are disclosed. An example DC-DC converter control circuit includes a switch controller to control respective switches of a SIMO DC-DC voltage converter that has multiple output circuits. The example control circuit also includes an arbitration circuit that determines a first one of the output circuits to have priority over other ones of the output circuits based on a priority signal, and selects a first output circuit to be charged during a first time slot based on the priority signal and based on first kick signals indicating that the at least two output circuits are to be charged. The control circuit also includes a next kick detector that determines a second one of the output circuits to be charged during a second time slot after the first time slot based on the priority. The control circuit also includes a time slot controller that determines a first time duration of the first time slot based on the determined second one of the output circuits, the arbitration circuit to output a second kick signal to the switch controller to control the switches to charge the first one of the output circuits during the first time slot.
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公开(公告)号：US09602088B1
公开(公告)日：2017-03-21
申请号：US14852155
申请日：2015-09-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Wei Fu , Keith Edmund Kunz , Russell George Byrd
CPC classification number: H03K5/00006 , G05F1/00 , G05F1/46 , H02M3/04 , H02M3/156 , H02M3/158 , H02M3/1588 , H02M2001/0006 , H02M2001/0032 , H02M2001/0048 , Y02B70/1491 , Y02B70/16
Abstract: Methods and apparatus for minimizing average quiescent current for a desire voltage error in a comparator are disclosed. An example method includes receiving a first voltage and a reference voltage, outputting a second voltage when the first voltage is lower than the reference voltage, wherein the outputting of the second voltage increases the first voltage, counting a number of clock cycles while the first voltage is higher than the reference voltage, comparing the number of clock cycles to a maximum number of clock cycles and a minimum number of clock cycles, when the number of clock cycles is above the maximum number of clock cycles, decreasing a frequency of a clock associated with the number of clock cycles, and when the number of clock cycles is below the minimum number of clock cycles increase the frequency of the clock.
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10.发明申请ULTRA-LOW POWER COMPARATOR WITH SAMPLING CONTROL LOOP ADJUSTING FREQUENCY AND/OR SAMPLE APERTURE WINDOW 有权具有采样控制环调节频率和/或采样孔径的超低功耗比较器公开(公告)号：US20170077912A1
公开(公告)日：2017-03-16
申请号：US14852155
申请日：2015-09-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Wei Fu , Keith Edmund Kunz , Russell George Byrd
CPC classification number: H03K5/00006 , G05F1/00 , G05F1/46 , H02M3/04 , H02M3/156 , H02M3/158 , H02M3/1588 , H02M2001/0006 , H02M2001/0032 , H02M2001/0048 , Y02B70/1491 , Y02B70/16
Abstract: Methods and apparatus for minimizing average quiescent current for a desire voltage error in a comparator are disclosed. An example method includes receiving a first voltage and a reference voltage, outputting a second voltage when the first voltage is lower than the reference voltage, wherein the outputting of the second voltage increases the first voltage, counting a number of clock cycles while the first voltage is higher than the reference voltage, comparing the number of clock cycles to a maximum number of clock cycles and a minimum number of clock cycles, when the number of clock cycles is above the maximum number of clock cycles, decreasing a frequency of a clock associated with the number of clock cycles, and when the number of clock cycles is below the minimum number of clock cycles increase the frequency of the clock.
Abstract translation: 公开了用于使比较器中的期望电压误差的平均静态电流最小化的方法和装置。 示例性方法包括接收第一电压和参考电压，当第一电压低于参考电压时输出第二电压，其中输出第二电压增加第一电压，对第一电压进行计数，同时第一电压 高于参考电压时，将时钟周期数与最大时钟周期数和最小时钟周期数进行比较，当时钟周期数高于最大时钟周期数时，减少时钟相关频率 具有时钟周期数，并且当时钟周期数低于最小时钟周期数时，会增加时钟频率。
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