公开(公告)号：US20080046633A1

公开(公告)日：2008-02-21

申请号：US11849340

申请日：2007-09-03

申请人： Ming-Shiang Shen

发明人： Ming-Shiang Shen

IPC分类号： G06F13/00

CPC分类号： G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data storage medium is adapted to be accessed by a data terminal, and includes a processing unit connected to a memory device that stores a data file and security reference data possessed by a person authorized to access the data file, and an input-output interface circuit activable so as to establish communication with the data terminal. The processing unit is operable selectively in a programming mode and a data retrieving mode. The electronic data storage medium also includes a function key set for manually switching the electronic data storage medium between the programming mode and the data retrieving mode.

公开(公告)号：US20080005585A1

公开(公告)日：2008-01-03

申请号：US11900941

申请日：2007-09-13

申请人： Ming-Shiang Shen

发明人： Ming-Shiang Shen

IPC分类号： H04K1/00

CPC分类号： G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data storage medium is adapted to be accessed by a data terminal, and includes a processing unit connected to a memory device that stores a data file and security reference data possessed by a person authorized to access the data file, and an input-output interface circuit activable so as to establish communication with the data terminal. The processing unit is operable selectively in a programming mode and a data retrieving mode. The electronic data storage medium also includes a function key set for manually switching the electronic data storage medium between the programming mode and the data retrieving mode.

公开(公告)号：US20080005582A1

公开(公告)日：2008-01-03

申请号：US11900938

申请日：2007-09-13

申请人： Ming-Shiang Shen

发明人： Ming-Shiang Shen

IPC分类号： H04K1/00

CPC分类号： G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data storage medium is adapted to be accessed by a data terminal, and includes a processing unit connected to a memory device that stores a data file and security reference data possessed by a person authorized to access the data file, and an input-output interface circuit activable so as to establish communication with the data terminal. The processing unit is operable selectively in a programming mode and a data retrieving mode. The electronic data storage medium also includes a function key set for manually switching the electronic data storage medium between the programming mode and the data retrieving mode.

公开(公告)号：US20070300029A1

公开(公告)日：2007-12-27

申请号：US11849339

申请日：2007-09-03

申请人： Ming-Shiang Shen

发明人： Ming-Shiang Shen

IPC分类号： G06F12/14

CPC分类号： G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data storage medium is adapted to be accessed by a data terminal, and includes a processing unit connected to a memory device that stores a data file and security reference data possessed by a person authorized to access the data file, and an input-output interface circuit activable so as to establish communication with the data terminal. The processing unit is operable selectively in a programming mode and a data retrieving mode. The electronic data storage medium also includes a function key set for manually switching the electronic data storage medium between the programming mode and the data retrieving mode.

公开(公告)号：US06547130B1

公开(公告)日：2003-04-15

申请号：US09366976

申请日：1999-08-04

申请人： Ming-Shiang Shen

发明人： Ming-Shiang Shen

IPC分类号： G06K500

CPC分类号： G06K9/0002 ,  G06K19/10

摘要： An integrated circuit card is accessed by a card reader that is capable of establishing a communications link with a host computer. The integrated circuit card includes a card body, a memory device mounted on the card body, a fingerprint sensor mounted on the card body, a card reader interface circuit mounted on the card body, and a processing unit mounted on the card body and connected to the memory device, the fingerprint sensor and the card reader interface circuit. The memory device stores fingerprint reference data obtained by scanning a fingerprint of an assigned user, and card information therein. The fingerprint sensor scans a fingerprint of a holder of the card body, and generates fingerprint scan data. The card reader interface circuit is activable so as to communicate with the card reader. The processing unit receives the fingerprint scan data from the fingerprint sensor, and compares the fingerprint scan data with the fingerprint reference data in the memory device to verify if the holder of the card body is the assigned user. The processing unit activates the card reader interface circuit for exchanging the card information with the host computer via the card reader upon verifying that the holder of the card body is the assigned user.

摘要翻译： 集成电路卡由读卡器访问，该读卡器能够与主计算机建立通信链路。 集成电路卡包括卡体，安装在卡体上的存储装置，安装在卡体上的指纹传感器，安装在卡体上的读卡器接口电路以及安装在卡体上并连接到卡体上的处理单元 存储器件，指纹传感器和读卡器接口电路。 存储装置存储通过扫描分配的用户的指纹而获得的指纹参考数据，以及其中的卡信息。 指纹传感器扫描卡体的保持器的指纹，并生成指纹扫描数据。 读卡器接口电路是可激活的，以便与读卡器通信。 处理单元从指纹传感器接收指纹扫描数据，并将指纹扫描数据与存储装置中的指纹参考数据进行比较，以验证卡主体的持有者是否是分配的用户。 处理单元在验证卡主体的保持者是分配的用户时，通过读卡器激活读卡器接口电路，用于与主计算机交换卡信息。

公开(公告)号：US08078794B2

公开(公告)日：2011-12-13

申请号：US11926743

申请日：2007-10-29

申请人： Charles C. Lee ,  David Q. Chow ,  Abraham Chih-Kang Ma ,  I-Kang Yu ,  Ming-Shiang Shen

发明人： Charles C. Lee ,  David Q. Chow ,  Abraham Chih-Kang Ma ,  I-Kang Yu ,  Ming-Shiang Shen

IPC分类号： G06F13/00

CPC分类号： G06F12/1416 ,  G06F3/0613 ,  G06F3/0643 ,  G06F3/0688 ,  G06F12/0246 ,  G06F12/0866 ,  G06F21/32 ,  G06F21/78 ,  G06F2212/2022 ,  G06F2212/7202 ,  G07C9/00087 ,  G11C2211/5641

摘要： Hybrid solid state drives (SSD) using a combination of single-level cell (SLC) and multi-level cell (MLC) flash memory arrays are described. According to one aspect of the present invention, a hybrid SSD is built using a combination SLC and MLC flash memory arrays. The SSD also includes a micro-controller to control and coordinate data transfer from a host computing device to either the SLC flash memory array of the MLC flash memory array. A memory selection indicator is determined by triaging data file based on one or more criteria, which include, but is not limited to, storing system files and user directories in the SLC flash memory array and storing user files in the MLC flash memory array; or storing more frequent access files in the SLC flash memory array, while less frequent accessed files in the MLC flash memory array.

摘要翻译： 描述了使用单级单元（SLC）和多级单元（MLC）闪存阵列的组合的混合固态驱动器（SSD）。 根据本发明的一个方面，使用组合SLC和MLC闪存阵列构建混合SSD。 SSD还包括一个微控制器，用于控制和协调从主机计算设备到MLC闪存阵列的SLC闪存阵列的数据传输。 存储器选择指示符通过基于一个或多个标准进行分类数据文件来确定，所述标准包括但不限于将系统文件和用户目录存储在SLC闪速存储器阵列中并将用户文件存储在MLC闪速存储器阵列中; 或将更频繁的访问文件存储在SLC闪存阵列中，而在MLC闪存阵列中访问的文件较少。

公开(公告)号：US20110197017A1

公开(公告)日：2011-08-11

申请号：US13089898

申请日：2011-04-19

申请人： I-Kang Yu ,  David Q. Chow ,  Charles C. Lee ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

发明人： I-Kang Yu ,  David Q. Chow ,  Charles C. Lee ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/02 ,  G06F12/08

CPC分类号： G06F12/0246 ,  G06F12/0866 ,  G06F2212/214 ,  G06F2212/7208 ,  G11C2211/5641

摘要： High endurance non-volatile memory devices (NVMD) are described. A high endurance NVMD includes an I/O interface, a NVM controller, a CPU along with a volatile memory subsystem and at least one non-volatile memory (NVM) module. The volatile memory cache subsystem is configured as a data cache subsystem. The at least one NVM module is configured as a data storage when the NVMD is adapted to a host computer system. The I/O interface is configured to receive incoming data from the host to the data cache subsystem and to send request data from the data cache subsystem to the host. The at least one NVM module may comprise at least first and second types of NVM. The first type comprises SLC flash memory while the second type MLC flash. The first type of NVM is configured as a buffer between the data cache subsystem and the second type of NVM.

摘要翻译： 描述了高耐久性非易失性存储器件（NVMD）。 高耐久性NVMD包括I / O接口，NVM控制器，CPU以及易失性存储器子系统和至少一个非易失性存储器（NVM）模块。 易失性存储器缓存子系统被配置为数据高速缓存子系统。 当NVMD适用于主机系统时，至少一个NVM模块被配置为数据存储器。 I / O接口被配置为从主机接收数据缓存子系统的传入数据，并将请求数据从数据缓存子系统发送到主机。 至少一个NVM模块可以包括至少第一和第二类型的NVM。 第一种类型包括SLC闪存，而第二种类型的MLC闪存。 NVM的第一种类型被配置为数据高速缓存子系统和第二类NVM之间的缓冲区。

公开(公告)号：US07962836B1

公开(公告)日：2011-06-14

申请号：US11657243

申请日：2007-01-24

申请人： Charles C. Lee ,  I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： Charles C. Lee ,  I-Kang Yu ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H03M13/00

CPC分类号： H03M13/1545 ,  G06F7/724 ,  H03M13/152 ,  H03M13/1575

摘要： A Bose, Ray-Chaudhuri, Hocquenghem (BCH) decoder is employed in non-volatile memory applications for determining the number of errors and locating the errors in a page of information. The decoder includes a syndrome calculator responsive to a sector of information. The sector includes data and overhead, with the data being organized into data sections and the overhead being organized into overhead sections. The syndrome calculator generates a syndrome for each of the data sections. A root finder is coupled to receive the calculated syndrome and to generate at least two roots. A polynomial calculator responds to the two roots and generates at least two error addresses, each identifying a location in the data wherein the error lies.

摘要翻译： Bose，Ray-Chaudhuri，Hocquenghem（BCH）解码器用于非易失性存储器应用中，用于确定错误数量并将错误定位在一页信息中。 解码器包括响应于信息扇区的综合征计算器。 该部门包括数据和开销，数据被组织成数据部分，开销被组织成开销部分。 综合征计算器为每个数据部分产生综合征。 根取景器耦合以接收所计算的综合征并产生至少两个根。 多项式计算器响应于两个根，并且生成至少两个错误地址，每个错误地址标识错误所在的数据中的位置。

公开(公告)号：US20110029723A1

公开(公告)日：2011-02-03

申请号：US12885451

申请日：2010-09-18

申请人： Charles C. Lee ,  David Q. Chow ,  Abraham Chih-Kang Ma ,  I-Kang Yu ,  Ming-Shiang Shen

发明人： Charles C. Lee ,  David Q. Chow ,  Abraham Chih-Kang Ma ,  I-Kang Yu ,  Ming-Shiang Shen

IPC分类号： G06F12/02 ,  G06F12/00

CPC分类号： G06K19/07743 ,  A45C2011/188 ,  G06K19/07732 ,  H05K1/117 ,  H05K1/118 ,  H05K1/189 ,  H05K3/284 ,  H05K3/4691 ,  H05K2201/091 ,  H05K2201/10159 ,  H05K2203/1527

摘要： Non-volatile memory based computer systems and methods are described. According to one aspect of the invention, at least one non-volatile memory module is coupled to a computer system as main storage. The non-volatile memory module is controlled by a northbridge controller configured to control the non-volatile memory as main memory. The page size of the at least one non-volatile memory module is configured to be the size of one of the cache lines associated with a microprocessor of the computer system. According to another aspect, at least one non-volatile memory module is coupled to a computer system as data read/write buffer of one or more hard disk drives. The non-volatile memory module is controlled by a southbridge controller configured to control the non-volatile memory as an input/out device. The page size of the at least one non-volatile memory module is configured in proportion to characteristics of the hard disk drives.

摘要翻译： 描述了基于非易失性存储器的计算机系统和方法。 根据本发明的一个方面，至少一个非易失性存储器模块耦合到作为主存储器的计算机系统。 非易失性存储器模块由配置成将非易失性存储器控制为主存储器的北桥控制器来控制。 至少一个非易失性存储器模块的页面大小被配置为与计算机系统的微处理器相关联的高速缓存行之一的大小。 根据另一方面，至少一个非易失性存储器模块作为一个或多个硬盘驱动器的数据读/写缓冲器耦合到计算机系统。 非易失性存储器模块由配置成将非易失性存储器控制为输入/输出设备的南桥控制器来控制。 至少一个非易失性存储器模块的页面大小被配置成与硬盘驱动器的特性成比例。

公开(公告)号：US07878852B2

公开(公告)日：2011-02-01

申请号：US11927387

申请日：2007-10-29

申请人： Siew Sin Hiew ,  Jim Chin-Nan Ni ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

发明人： Siew Sin Hiew ,  Jim Chin-Nan Ni ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

IPC分类号： H01R13/648

CPC分类号： G06K19/077 ,  G06K19/07732 ,  H05K5/0278

摘要： A Universal Serial Bus (USB) memory card includes a tube metal housing that is rectangularly-shaped and a Chip-On-Board (COB)-Universal Serial Bus (USB) device and a carrier substrate having a U-block disposed on one side of thereof and vertically extending upwardly from a bottom surface of the U-block, the COB-USB device positioned on the carrier substrate forming a USB card sub-assembly, the USB card sub-assembly being securely located inside the metal housing with the U-block serving to stop the COB-USB device from slipping out of the metal housing.

摘要翻译： 通用串行总线（USB）存储卡包括矩形的管状金属外壳和片上芯片（COB） - 通用串行总线（USB）设备和具有设置在一侧的U形块的载体基板 并且从U形块的底面垂直向上延伸，COB-USB装置定位在形成USB卡子组件的载体衬底上，USB卡子组件牢固地位于金属外壳内，U形 块用于停止COB-USB设备从金属外壳滑出。