公开(公告)号：US07804258B2

公开(公告)日：2010-09-28

申请号：US11929194

申请日：2007-10-30

Applicant: Bin Zhao

Inventor： Bin Zhao

IPC: G05F1/00

CPC classification number: H05B33/0812 ,  Y02B20/345

Abstract: A circuit can provide an approximately constant resistance value that is virtually independent of process and temperature variations. A current control circuit may use a device that tracks the changes in a corresponding device over process and temperature variations. As a result, the behavior of device may be used to help determine the control information provided to device in order to maintain an approximately constant resistance Rm over process and temperature variations. The approximately constant resistance Rm may be used to provide an approximately constant current ILED. A wide variety of applications, not just LED drivers, may benefit from the use of an approximately constant resistance and/or current.

Abstract translation: 电路可以提供几乎不变的过程和温度变化的近似恒定的电阻值。 电流控制电路可以使用跟踪过程和温度变化的对应装置中的变化的装置。 结果，可以使用装置的行为来帮助确定提供给装置的控制信息，以便在过程和温度变化上保持大致恒定的电阻Rm。 可以使用大致恒定的电阻Rm来提供近似恒定的电流ILED。 各种应用，不仅仅是LED驱动器，可能受益于使用近似恒定的电阻和/或电流。

公开(公告)号：US20100194308A1

公开(公告)日：2010-08-05

申请号：US12363607

申请日：2009-01-30

Applicant: Bin Zhao ,  Jack W. Cornish ,  Brian B. Horng ,  Victor K. Lee ,  Andrew M. Kameya

Inventor： Bin Zhao ,  Jack W. Cornish ,  Brian B. Horng ,  Victor K. Lee ,  Andrew M. Kameya

IPC: H05B37/02

CPC classification number: H05B33/0815 ,  H05B33/0827 ,  Y02B20/347

Abstract: A voltage source provides an output voltage to drive a plurality of light emitting diode (LED) strings. A LED driver adjusts the level of the output voltage so as to maintain the lowest tail voltage of the LED strings at or near a predetermined threshold voltage so as provide sufficient headroom voltages for current regulators for the LED strings. The LED driver operates in an operational mode and a calibration mode, which can be implemented in parallel with, or part of, the operational mode. During the calibration mode, the LED driver determines, for each LED string, a code value representative of the level of the output voltage necessary to maintain the tail voltage of the corresponding LED string at or near the predetermined threshold voltage. In the operational mode, the code values from the calibration mode are used to control the voltage source to provide an appropriate level for the output voltage.

Abstract translation: 电压源提供输出电压以驱动多个发光二极管（LED）串。 LED驱动器调节输出电压的电平，以便将LED串的最低尾电压保持在预定阈值电压处或接近预定阈值电压，以便为LED串的电流调节器提供足够的净空电压。 LED驱动器在操作模式和校准模式下操作，其可以与操作模式并行或部分实现。 在校准模式期间，LED驱动器针对每个LED串确定代表将相应LED串的尾部电压保持在或接近预定阈值电压所需的输出电压电平的代码值。 在操作模式下，来自校准模式的代码值用于控制电压源以为输出电压提供适当的电平。

公开(公告)号：US20080250110A1

公开(公告)日：2008-10-09

申请号：US12059926

申请日：2008-03-31

Applicant: Bin Zhao

Inventor： Bin Zhao

IPC: G06F15/16

CPC classification number: G06Q10/107 ,  G06F9/546 ,  H04L12/1813 ,  H04L12/1868 ,  H04L51/30

Abstract: In one embodiment, a distributed environment for supporting on-line collaborative meetings among a plurality of users includes a plurality of applications executing on different client machines. A sequence of messages is transmitted from a first application of the distributed environment to a second application of the distributed environment, using a multicast form of delivery. A request for re-transmission is received from the second application specifying at least one message of the sequence that was not received by the second application. In response to the request, the specified at least one message of the sequence is retransmitted from the first application to the second application using a reliable unicast form of delivery.

Abstract translation: 在一个实施例中，用于支持多个用户之间的在线协作会议的分布式环境包括在不同客户端机器上执行的多个应用程序。 使用多播形式的传送将消息序列从分布式环境的第一应用发送到分布式环境的第二应用。 从第二应用程序接收到重新发送的请求，指定序列的至少一个未被第二应用接收的消息。 响应于该请求，使用可靠的单播传送形式将序列的指定的至少一个消息从第一应用重新发送到第二应用。

公开(公告)号：US20080246457A1

公开(公告)日：2008-10-09

申请号：US12157241

申请日：2008-06-09

Applicant: Bin Zhao

Inventor： Bin Zhao

IPC: G05F5/08

CPC classification number: H02M3/07

Abstract: According to one exemplary embodiment, a voltage up-conversion circuit includes a modulated voltage generator circuit, where the modulated voltage generator circuit is configured to receive an input voltage and generate a modulated voltage, and where the modulated voltage generator circuit includes at least one transistor. The voltage up-conversion circuit further includes a switching circuit coupled to the modulated voltage generator circuit, where the switching circuit is configured to couple the modulated voltage to a load capacitor when the modulated voltage is at a high level and decouple the modulated voltage to the load capacitor when the modulated voltage is at a low level. In the voltage up-conversion circuit, the load capacitor reaches a voltage greater a breakdown voltage of the at least one transistor in the modulated voltage generator circuit. The breakdown voltage can be a reliability breakdown voltage.

Abstract translation: 根据一个示例性实施例，电压上变换电路包括调制电压发生器电路，其中调制电压发生器电路被配置为接收输入电压并产生调制电压，并且其中调制电压发生器电路包括至少一个晶体管 。 电压上变换电路还包括耦合到调制电压发生器电路的开关电路，其中开关电路被配置为当调制电压处于高电平时将调制电压耦合到负载电容器，并将调制电压去耦到 当调制电压处于低电平时加载电容。 在电压上变换电路中，负载电容器达到调制电压发生器电路中至少一个晶体管的击穿电压更大的电压。 击穿电压可以是可靠性击穿电压。

公开(公告)号：US07408330B2

公开(公告)日：2008-08-05

申请号：US11448651

申请日：2006-06-06

Applicant: Bin Zhao

Inventor： Bin Zhao

IPC: G05F1/00

CPC classification number: H02M3/07

Abstract: According to one exemplary embodiment, a voltage up-conversion circuit includes a modulated voltage generator circuit, where the modulated voltage generator circuit is configured to receive an input voltage and generate a modulated voltage, and where the modulated voltage generator circuit includes at least one transistor. The voltage up-conversion circuit further includes a switching circuit coupled to the modulated voltage generator circuit, where the switching circuit is configured to couple the modulated voltage to a load capacitor when the modulated voltage is at a high level and decouple the modulated voltage to the load capacitor when the modulated voltage is at a low level. In the voltage up-conversion circuit, the load capacitor reaches a voltage greater a breakdown voltage of the at least one transistor in the modulated voltage generator circuit. The breakdown voltage can be a reliability breakdown voltage.

Abstract translation: 根据一个示例性实施例，电压上变换电路包括调制电压发生器电路，其中调制电压发生器电路被配置为接收输入电压并产生调制电压，并且其中调制电压发生器电路包括至少一个晶体管 。 电压上变换电路还包括耦合到调制电压发生器电路的开关电路，其中开关电路被配置为当调制电压处于高电平时将调制电压耦合到负载电容器，并将调制电压去耦到 当调制电压处于低电平时加载电容。 在电压上变换电路中，负载电容器达到调制电压发生器电路中至少一个晶体管的击穿电压更大的电压。 击穿电压可以是可靠性击穿电压。

公开(公告)号：US07073127B2

公开(公告)日：2006-07-04

申请号：US10188463

申请日：2002-07-01

Applicant: Bin Zhao ,  Rusong Fang ,  Lihong Wang

Inventor： Bin Zhao ,  Rusong Fang ,  Lihong Wang

IPC: G09G5/00

CPC classification number: G11B27/34 ,  G11B27/034

Abstract: A graphical user interface for editing a video story includes a storyboard pane, a timeline pane, and a layer pane. The storyboard pane displays video clips of the video story and their transitions. The timeline pane displays tracks including a video track, a video overlay track, a text track, an effect track, and at least one audio track. The layer pane displays layers of a selected video clip from the video track. Each layer displays one layer clip. The layer clip can be a video layer clip, a text layer clip, or an audio layer clip. The layers in the layer pane show how the layer clips overlay each other (or not) in time to compose the selected video clip. A user uses the storyboard pane and the timeline pane to layout the video story, and the layer pane to layout the video clips in the video story.

Abstract translation: 用于编辑视频故事的图形用户界面包括故事板窗格，时间轴窗格和图层窗格。 故事板窗格显示视频故事及其过渡的视频剪辑。 时间轴窗格显示包括视频轨道，视频覆盖轨道，文本轨道，效果轨道和至少一个音频轨道的轨道。 图层窗格从视频轨道显示所选视频剪辑的图层。 每层显示一层剪辑。 层剪辑可以是视频层剪辑，文本层剪辑或音频层剪辑。 图层窗格中的图层显示了层次剪辑如何及时叠加（或不及时）组合所选视频剪辑。 用户使用故事板窗格和时间轴窗格布局视频故事，以及图层窗格，以在视频故事中布局视频剪辑。

公开(公告)号：US07049246B1

公开(公告)日：2006-05-23

申请号：US09575055

申请日：2000-05-19

Applicant: Q. Z. Liu ,  David Feiler ,  Bin Zhao ,  Phil N. Sherman ,  Maureen Brongo

Inventor： Q. Z. Liu ,  David Feiler ,  Bin Zhao ,  Phil N. Sherman ,  Maureen Brongo

IPC: H01L21/302 ,  H01L21/461 ,  H01L21/20 ,  H01L21/8242

CPC classification number: H01L28/86 ,  H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Method for selective fabrication of high capacitance density areas in a low dielectric constant material and related structure are disclosed. In one embodiment, a first area of a dielectric layer is covered while a second area of the dielectric layer is exposed to a dielectric conversion source. The exposure causes the dielectric constant of the dielectric layer in the second area to increase. A number of interconnect trenches are etched in the first area of the dielectric and a number of capacitor trenches are etched in the second area of the dielectric. The interconnect trenches and the capacitor trenches are then filled with an appropriate metal, such as copper, and a chemical mechanical polish is performed. The second area in which the capacitor trenches have been etched and filled has a higher capacitance density relative to the first area.

Abstract translation: 公开了用于选择性地制造低介电常数材料和相关结构中的高电容密度区域的方法。 在一个实施例中，电介质层的第一区域被覆盖，同时介电层的第二区域暴露于电介质转换源。 曝光导致第二区域中介电层的介电常数增加。 在电介质的第一区域中蚀刻多个互连沟槽，并且在电介质的第二区域中蚀刻多个电容器沟槽。 然后用适当的金属（例如铜）填充互连沟槽和电容器沟槽，并进行化学机械抛光。 其中电容器沟槽被蚀刻和填充的第二区域相对于第一区域具有较高的电容密度。

公开(公告)号：US06838352B1

公开(公告)日：2005-01-04

申请号：US10190459

申请日：2002-07-05

Applicant: Bin Zhao

Inventor： Bin Zhao

IPC: H01L21/02 ,  H01L21/768 ,  H01L21/20

CPC classification number: H01L28/75 ,  H01L21/76807 ,  H01L23/5223

Abstract: A method for fabricating a capacitor on a semiconductor substrate is disclosed. The method may include simultaneously forming at least one via and at least one upper capacitor plate opening in a first dielectric layer having an underlying cap dielectric layer deposited over a first material region having a first conductive material within a conductive region and forming a trench above the via. The method may also include filling the via, trench, and upper capacitor plate opening with a second conductive material resulting in an integrated circuit structure and employing CMP to remove any excess second conductive material from the integrated circuit structure.

Abstract translation: 公开了一种在半导体衬底上制造电容器的方法。 该方法可以包括同时形成至少一个通孔和至少一个上电容器板开口，该第一电介质层具有沉积在具有导电区域内的第一导电材料的第一材料区域上的底层盖电介质层，并且形成在 通过。 该方法还可以包括用第二导电材料填充通孔，沟槽和上电容器板开口，得到集成电路结构，并采用CMP从集成电路结构中去除任何多余的第二导电材料。

公开(公告)号：US06809863B2

公开(公告)日：2004-10-26

申请号：US10016166

申请日：2001-11-30

Applicant: Bin Zhao

Inventor： Bin Zhao

IPC: G02B530

CPC classification number: G02B5/3083 ,  Y10S359/90

Abstract: A low dispersion comb filter or interleaver assembly has a first interleaver element and a second interleaver element. The first interleaver element is configured so as to provide a dispersion vs. wavelength curve wherein each dispersion value thereof is approximately opposite in value to a dispersion value at the same wavelength for the second interleaver element, so as to mitigate net or total dispersion in the interleaver assembly.

Abstract translation: 低色散梳状滤波器或交织器组件具有第一交织器元件和第二交织器元件。 第一交织器元件被配置为提供色散相对于波长曲线，其中其每个色散值与第二交织器元件的相同波长处的色散值几乎相反，以便减轻第二交织器元件中的净色散或总色散 交织器装配。

公开(公告)号：US06787911B1

公开(公告)日：2004-09-07

申请号：US09317536

申请日：1999-05-24

Applicant: Bin Zhao ,  Maureen R. Brongo

Inventor： Bin Zhao ,  Maureen R. Brongo

IPC: H01L2348

CPC classification number: H01L21/76802 ,  H01L21/76801 ,  H01L21/76819 ,  H01L21/76834

Abstract: A method is provided for forming an improved interconnect structure on a semiconductor body. A first metal layer is deposited on the semiconductor body. A sacrificial layer having a height is deposited on the first metal layer. The sacrificial layer and the metal layer are patterned to form separate metal lines with the sacrificial layer remaining on said metal lines. A look material is then deposited to fill the gaps bet n metal lines and to cover the sacrificial layer. The low-k material is then removed to a level within the height of the sacrificial layer. The sacrificial layer is then removed. A prove layer is deposited on top of the metal lines and the look material. A dielectric layer is deposited over the protective layer. The protective layer protects the low-k material from attack by chemicals utilized by subsequent process steps to etch vias in the dielectric layer, to strip photoresist, and to clean the vias. The protective layer is then selectively etched away to make contact between a via plug and the metal lines.

Abstract translation: 提供了一种用于在半导体本体上形成改进的互连结构的方法。 第一金属层沉积在半导体本体上。 具有高度的牺牲层沉积在第一金属层上。 牺牲层和金属层被图案化以形成分离的金属线，牺牲层保留在所述金属线上。 然后沉积外观材料以填充金属线上的间隙并覆盖牺牲层。 然后将低k材料去除到牺牲层的高度内的水平。 然后去除牺牲层。 证明层沉积在金属线和外观材料的顶部。 介电层沉积在保护层上。 保护层保护低k材料免受后续工艺步骤所用化学品的侵蚀，以蚀刻电介质层中的通孔，剥离光致抗蚀剂，并清洁通孔。 然后选择性地蚀刻保护层以使通孔塞和金属线之间的接触。