Feedback control system and method
    151.
    发明授权

    公开(公告)号:US10439539B2

    公开(公告)日:2019-10-08

    申请号:US15135330

    申请日:2016-04-21

    Abstract: The present disclosure provides a feedback control system and method for a bidirectional VCM. The system employs an analog core that is common to both the PWM and linear modes of operation. The analog core includes a feedback mechanism that determines the error in the current flowing through the motor. The feedback mechanism produces an error voltage that corresponds to the current error, and applies the voltage to a control driver. The control driver then controls the motor, based on the error voltage, in either a PWM or linear mode. By sharing a common core, the switching time between modes is improved. Furthermore, the output current error between modes is reduced.

    Low power synchronization of multiple analog to digital converters

    公开(公告)号:US10320407B1

    公开(公告)日:2019-06-11

    申请号:US15890086

    申请日:2018-02-06

    Abstract: A system having two or more sensing nodes coupled to a control node using a serial communication channel having separate transmit and receive circuits, where each sensing node includes an ADC circuit and a microcontroller, operation of the ADC circuit in each sensing node is concurrently synchronized by the control node using the transmit circuit (e.g., with respect to the control node) of the serial communication channel. The control node can synchronize operation of two or more ADC circuits in separate sensing nodes without using shared clocks or other control signals.

    PLATED METALLIZATION STRUCTURES
    155.
    发明申请

    公开(公告)号:US20190148229A1

    公开(公告)日:2019-05-16

    申请号:US15810836

    申请日:2017-11-13

    Abstract: The disclosed technology generally relates to forming metallization structures for integrated circuit devices by plating, and more particularly to plating metallization structures that are thicker than masking layers used to define the metallization structures. In one aspect, a method of metallizing an integrated circuit device includes plating a first metal on a substrate in a first opening formed through a first masking layer, where the first opening defines a first region of the substrate, and plating a second metal on the substrate in a second opening formed through a second masking layer, where the second opening defines a second region of the substrate. The second opening is wider than the first opening and the second region encompasses the first region of the substrate.

    PHASED ARRAY AMPLIFIER LINEARIZATION
    157.
    发明申请

    公开(公告)号:US20190131934A1

    公开(公告)日:2019-05-02

    申请号:US15801232

    申请日:2017-11-01

    Abstract: Apparatus and methods provide predistortion for a phased array. Radio frequency (RF) sample signals from phased array elements are provided along return paths and are combined by a hardware RF combiner. Phase shifters are adjusted such that the RF sample signals are phase-aligned when combined. Adaptive adjustment of predistortion for the amplifiers of the phased array can be based on a signal derived from the combined RF sample signals.

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