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    Method for manufacturing thin film type solar cell
    163.
    发明授权
    Method for manufacturing thin film type solar cell 有权
    制造薄膜型太阳能电池的方法

    公开(公告)号：US08338221B2

    公开(公告)日：2012-12-25

    申请号：US12628215

    申请日：2009-12-01

    Applicant: Chang Ho Lee ,  Hyung Dong Kang ,  Hyun Ho Lee ,  Yong Hyun Lee ,  Seon Myung Kim

    Inventor： Chang Ho Lee ,  Hyung Dong Kang ,  Hyun Ho Lee ,  Yong Hyun Lee ,  Seon Myung Kim

    IPC: H01L21/00 ,  H01L29/04 ,  H01L29/10 ,  H01L31/00

    CPC classification number: H01L31/075 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/0262 ,  H01L31/03767 ,  H01L31/202 ,  Y02E10/548 ,  Y02P70/521

    Abstract: A method for manufacturing a thin film type solar cell is disclosed, which is capable of reducing degradation of solar cell by decreasing the number of dangling bonding sites or SiH2 bonding sites existing in amorphous silicon owing to an optimal content ratio of ingredient gases, an optimal chamber pressure, or an optimal substrate temperature during a process for depositing an I-type semiconductor layer of amorphous silicon by a plasma CVD method, the method comprising forming a front electrode layer on a substrate; sequentially depositing P-type, I-type, and N-type semiconductor layers on the front electrode layer; and forming a rear electrode layer on the N-type semiconductor layer, wherein the process for forming the I-type semiconductor layer comprises forming an amorphous silicon layer by the plasma CVD method under such circumstances that at least one of the aforementioned conditions is satisfied, for example, a content ratio of silicon-containing gas to hydrogen-containing gas is within a range between 1:7 and 1:10; a chamber pressure is maintained at a range between 2.0 Torr and 2.4 Torr; and a substrate temperature is maintained at a range between 225° C. and 250° C.

    Abstract translation: 公开了一种制造薄膜型太阳能电池的方法，其能够通过减少非晶硅中存在的悬挂键合位置或SiH 2键合位置的数量来减少太阳能电池的劣化，这是由于成分气体的最佳含量比，最佳 在通过等离子体CVD法沉积非晶硅的I型半导体层的工艺期间的腔室压力或最佳衬底温度，所述方法包括在衬底上形成前电极层; 在前电极层上依次沉积P型，I型和N型半导体层; 以及在所述N型半导体层上形成后电极层，其中所述形成所述I型半导体层的工艺包括通过等离子体CVD法在满足上述条件中的至少一个条件的情况下形成非晶硅层， 例如，含硅气体与含氢气体的含有比例在1:7〜1:10的范围内; 腔室压力保持在2.0托和2.4托之间的范围内; 并且衬底温度保持在225℃和250℃之间的范围内。

    Systems and Methods for Minimizing Phase Deviation and/or Amplitude Modulation (AM)-to-Phase Modulation (PM) Conversion for Dynamic Range, Radio Frequency (RF) Non-Linear Amplifiers
    164.
    发明申请
    Systems and Methods for Minimizing Phase Deviation and/or Amplitude Modulation (AM)-to-Phase Modulation (PM) Conversion for Dynamic Range, Radio Frequency (RF) Non-Linear Amplifiers 有权
    用于最小化用于动态范围射频（RF）非线性放大器的相位偏差和/或幅度调制（AM）到相位调制（PM）转换的系统和方法

    公开(公告)号：US20120286860A1

    公开(公告)日：2012-11-15

    申请号：US13104838

    申请日：2011-05-10

    Applicant: Yunseo Park ,  Wangmyong Woo ,  Jaejoon Kim ,  Chang-Ho Lee

    Inventor： Yunseo Park ,  Wangmyong Woo ,  Jaejoon Kim ,  Chang-Ho Lee

    IPC: H03F3/68

    CPC classification number: H03F3/45183 ,  H03F3/19 ,  H03F3/211 ,  H03F2200/102 ,  H03F2200/411 ,  H03F2203/45352 ,  H03F2203/45362 ,  H03F2203/45631 ,  H03F2203/45702

    Abstract: Embodiments of the invention may provide systems and methods for minimizing phase deviation and/or amplitude modulation (AM)-to-phase modulation (PM) conversion for dynamic range, radio frequency (RF) non-linear amplifiers. In order to provide high dynamic range with reduced phase error, embodiments of the invention may utilize two separate paths for processing a signal. In particular, an input signal may be sampled and divided into each path. The first signal path may be used to shape a signal, and in particular, a voltage waveform at the load. The second signal path may be used for generating negative capacitances corresponding to the voltage waveform at the load. By combining the two signals at the load, a high-dynamic range, high-frequency, non-linear amplifier can be achieved that reduces phase error resulting from amplitude fluctuations with a relatively low unity-gain frequency (fT) process.

    Abstract translation: 本发明的实施例可以提供用于最小化用于动态范围射频（RF）非线性放大器的相位偏移和/或幅度调制（AM）到相位调制（PM）转换的系统和方法。 为了提供具有减小的相位误差的高动态范围，本发明的实施例可以利用两个单独的路径来处理信号。 特别地，输入信号可以被采样并分成每个路径。 第一信号路径可以用于对信号进行整形，特别是负载处的电压波形。 第二信号路径可以用于产生对应于负载处的电压波形的负电容。 通过在负载下组合两个信号，可以实现高动态范围，高频，非线性放大器，以相对低的单位增益频率（fT）过程减小由幅度波动引起的相位误差。

    Tire for a car
    166.
    外观设计
    Tire for a car 有权
    汽车轮胎

    公开(公告)号：USD644982S1

    公开(公告)日：2011-09-13

    申请号：US29354211

    申请日：2010-01-20

    Applicant: Chang Ho Lee

    Designer： Chang Ho Lee

    Systems and methods for positive and negative feedback of cascode transistors for a power amplifier
    167.
    发明授权
    Systems and methods for positive and negative feedback of cascode transistors for a power amplifier 有权
    用于功率放大器的共源共栅晶体管的正和负反馈的系统和方法

    公开(公告)号：US07969246B1

    公开(公告)日：2011-06-28

    申请号：US12723038

    申请日：2010-03-12

    Applicant: Kyu Hwan An ,  Yunseo Park ,  Chang-Ho Lee

    Inventor： Kyu Hwan An ,  Yunseo Park ,  Chang-Ho Lee

    IPC: H03F3/04

    CPC classification number: H03F1/342 ,  H03F1/223 ,  H03F3/45179 ,  H03F2200/09 ,  H03F2200/108 ,  H03F2203/45394

    Abstract: Systems and methods are provided for positive and negative feedback of cascode transistors for a power amplifier. The systems and methods may include a first cascode stage comprising a first common-source device and a first common-gate device; a second cascode stage comprising a second common-source device and a second common-gate device; a first degenerative element or block provided for the first common-source device; a second degenerative element or block provided for the second common-source device; a first positive feedback block or element that connects a first gate of the first common-source device with a second drain of the second common-source device; and a second positive feedback block or element that connects a second gate of the second common-source device with a first drain of the first common-source device.

    Abstract translation: 提供了用于功率放大器的共源共栅晶体管的正和负反馈的系统和方法。 所述系统和方法可以包括包括第一共源器件和第一共栅极器件的第一共源共栅级; 第二共源共栅级，包括第二共源装置和第二共栅装置; 为第一共源装置提供的第一退化元件或块; 为第二共源装置提供的第二退化元件或块; 将所述第一共源装置的第一栅极与所述第二共源装置的第二漏极连接的第一正反馈块或元件; 以及将第二共源装置的第二栅极与第一共源装置的第一漏极连接的第二正反馈块或元件。

    Low power mode amplification with a transformer output matching and a virtual ground
    169.
    发明授权
    Low power mode amplification with a transformer output matching and a virtual ground 有权
    低功耗模式放大，具有变压器输出匹配和虚拟接地

    公开(公告)号：US07944296B1

    公开(公告)日：2011-05-17

    申请号：US12722990

    申请日：2010-03-12

    Applicant: Chang-Ho Lee ,  Kyu Hwan An ,  Yunseo Park

    Inventor： Chang-Ho Lee ,  Kyu Hwan An ,  Yunseo Park

    IPC: H03F1/00

    CPC classification number: H03F1/0277 ,  H03F1/565 ,  H03F2200/312 ,  H03F2200/537 ,  H03F2200/541

    Abstract: A power amplifier system in accordance with an example embodiment can utilize a transformer having a primary winding inductively coupled to a secondary winding, where the primary winding includes a center tap between a first port and a second port, where the secondary winding includes a third port and a fourth port, where the primary winding receives a first output from a first amplifier, where the center tap receives a second output from a second amplifier. The system can also include a first capacitor connected to the center tap and the first port; a second capacitor connected to the center tap and the second port; a first switch in electrical connection with the center tap, where the first switch can connect the center tap to a ground port; a second switch connected to the fourth port, where the second switch can connect the fourth port to a common node in electrical connection with the center tap; and a third capacitor connected between the common node and an output node connected to the third port from a system output can be obtained.

    Abstract translation: 根据示例性实施例的功率放大器系统可以利用具有感应耦合到次级绕组的初级绕组的变压器，其中初级绕组包括在第一端口和第二端口之间的中心抽头，其中次级绕组包括第三端口 以及第四端口，其中初级绕组从第一放大器接收第一输出，其中中心抽头接收来自第二放大器的第二输出。 该系统还可以包括连接到中心抽头和第一端口的第一电容器; 连接到中心抽头和第二端口的第二电容器; 与中心抽头电连接的第一开关，其中第一开关可将中心抽头连接到接地端口; 连接到第四端口的第二开关，其中第二开关可以将第四端口连接到与中心抽头电连接的公共节点; 并且可以获得连接在公共节点与从系统输出连接到第三端口的输出节点之间的第三电容器。

    Systems and methods for an adaptive bias circuit for a differential power amplifier
    170.
    发明授权
    Systems and methods for an adaptive bias circuit for a differential power amplifier 有权
    用于差分功率放大器的自适应偏置电路的系统和方法

    公开(公告)号：US07944293B2

    公开(公告)日：2011-05-17

    申请号：US12620462

    申请日：2009-11-17

    Applicant: Dong Ho Lee ,  Kyu Hwan An ,  Jeonghu Han ,  Chang-Ho Lee ,  Joy Laskar

    Inventor： Dong Ho Lee ,  Kyu Hwan An ,  Jeonghu Han ,  Chang-Ho Lee ,  Joy Laskar

    IPC: H03F3/68

    CPC classification number: H03F3/45179 ,  H03F2203/45394 ,  H03F2203/45541

    Abstract: Systems and methods for providing an adaptive bias circuit that may include a differential amplifier, low-pass filter, and common source amplifier or common emitter amplifier. The adaptive bias circuit may generate an adaptive bias output signal depending on input signal power level. As the input power level goes up, the adaptive bias circuit may increase the bias voltage or bias current of the adaptive bias output signal. A power amplifier (e.g., a differential amplifier) may be biased according to the adaptive bias output signal in order to reduce current consumption at low power operation levels.

    Abstract translation: 用于提供可包括差分放大器，低通滤波器和公共源放大器或公共发射极放大器的自适应偏置电路的系统和方法。 自适应偏置电路可以根据输入信号功率电平产生自适应偏置输出信号。 随着输入功率电平上升，自适应偏置电路可以增加自适应偏置输出信号的偏置电压或偏置电流。 可以根据自适应偏置输出信号偏置功率放大器（例如，差分放大器），以便在低功率操作电平下减少电流消耗。

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