公开(公告)号：US12087871B2

公开(公告)日：2024-09-10

申请号：US18385213

申请日：2023-10-30

Applicant: W&W Sens Devices, Inc.

Inventor： Shih-Yuan Wang ,  Shih-Ping Wang

IPC: H01L31/0236 ,  G02B6/122 ,  G02B6/136 ,  H01L23/66 ,  H01L31/02 ,  H01L31/0224 ,  H01L31/0232 ,  H01L31/024 ,  H01L31/028 ,  H01L31/0304 ,  H01L31/0312 ,  H01L31/0352 ,  H01L31/036 ,  H01L31/054 ,  H01L31/0745 ,  H01L31/075 ,  H01L31/077 ,  H01L31/105 ,  H01L31/107 ,  H01L31/18 ,  G02B6/12

CPC classification number: H01L31/035272 ,  G02B6/122 ,  G02B6/136 ,  H01L23/66 ,  H01L31/02005 ,  H01L31/02016 ,  H01L31/02019 ,  H01L31/022408 ,  H01L31/022475 ,  H01L31/02327 ,  H01L31/02363 ,  H01L31/024 ,  H01L31/028 ,  H01L31/0284 ,  H01L31/0304 ,  H01L31/03046 ,  H01L31/0312 ,  H01L31/035209 ,  H01L31/035227 ,  H01L31/035281 ,  H01L31/036 ,  H01L31/054 ,  H01L31/0745 ,  H01L31/075 ,  H01L31/077 ,  H01L31/105 ,  H01L31/1055 ,  H01L31/107 ,  H01L31/1075 ,  H01L31/1804 ,  H01L31/1808 ,  H01L31/1812 ,  H01L31/184 ,  H01L31/1844 ,  G02B2006/12097 ,  G02B2006/12176 ,  H01L2223/6627 ,  Y02E10/52 ,  Y02E10/548

Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.

公开(公告)号：US10084107B2

公开(公告)日：2018-09-25

申请号：US14954831

申请日：2015-11-30

Applicant: SolarCity Corporation

Inventor： Jianming Fu ,  Zheng Xu ,  Jiunn Benjamin Heng ,  Chentao Yu

IPC: H01L31/074 ,  H01L31/0216 ,  H01L31/18 ,  H01L31/0224 ,  H01L31/072 ,  H01L31/075

CPC classification number: H01L31/074 ,  H01L31/02167 ,  H01L31/022466 ,  H01L31/022475 ,  H01L31/072 ,  H01L31/075 ,  H01L31/1804 ,  H01L31/1868 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

Abstract: One embodiment of the present invention provides a solar cell. The solar cell includes a Si base layer, a passivation layer situated above the Si base layer, a layer of heavily doped amorphous Si (a-Si) situated above the passivation layer, a first transparent-conducting-oxide (TCO) layer situated above the heavily doped a-Si layer, a back-side electrode situated below the Si base layer, and a front-side electrode situated above the first TCO layer. The first TCO layer comprises at least one of: GaInO, GaInSnO, ZnInO, and ZnInSnO.

公开(公告)号：US20180244528A1

公开(公告)日：2018-08-30

申请号：US15965206

申请日：2018-04-27

Applicant: The Trustees of Princeton University

Inventor： Paul J. Steinhardt ,  Slavatore Torquato ,  Miroslav Hejna

IPC: C01B33/02 ,  H01L31/0376

CPC classification number: C01B33/02 ,  H01L31/03762 ,  Y02E10/548

Abstract: This invention is in the field of physical chemistry and relates to novel hyperuniform and nearly hyperuniform random network materials and methods of making said materials. Methods are described for controlling or altering the band gap of a material, and in particular commercially useful materials such as amorphous silicon. These methods can be exploited in the design of semiconductors, transistors, diodes, solar cells and the like.

公开(公告)号：US20180190853A1

公开(公告)日：2018-07-05

申请号：US15846463

申请日：2017-12-19

Applicant: NATIONAL TAIWAN NORMAL UNIVERSITY

Inventor： MIN-HUNG LEE ,  CHIH-YU CHEN ,  GING-RUE LIOU ,  SHU-TONG CHANG

IPC: H01L31/0747 ,  H01L31/18

CPC classification number: H01L31/0747 ,  H01L31/1804 ,  Y02E10/546 ,  Y02E10/548 ,  Y02P70/521

Abstract: A Heterojunction with Intrinsic Thin layer (HIT) solar cell has a crystalline Si substrate, an intrinsic amorphous Si layer, a doped amorphous Si layer, a transparent conductive layer and two electrode layers. The intrinsic amorphous Si layer disposed between the doped amorphous Si layer and the crystalline silicon substrate contacts the doped amorphous Si layer and the crystalline silicon substrate. Each of the intrinsic amorphous Si layer and the doped amorphous Si layer has the thickness less than 50 nm. The intrinsic amorphous Si layer and the doped amorphous Si layer are both made by electron beam evaporation. The transparent conductive layer is formed on the doped amorphous Si layer. The two electrode layers are formed on the transparent conductive layer and the crystalline silicon substrate respectively. The crystalline silicon substrate is disposed between the two electrode layers.

公开(公告)号：US20180175225A1

公开(公告)日：2018-06-21

申请号：US15894690

申请日：2018-02-12

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  Bay Zu Precision Co., LTD.

Inventor： SHUN-MING CHEN ,  CHIEN-CHIH HUANG ,  JOEL P. DESOUZA ,  AUGUSTIN J. HONG ,  JEEHWAN KIM ,  CHIEN-YEH KU ,  DEVENDRA K. SADANA ,  CHUAN-WEN WANG

IPC: H01L31/0224 ,  H01L31/075 ,  H01L31/18 ,  H01L31/0392

CPC classification number: H01L31/022483 ,  H01L31/022425 ,  H01L31/03921 ,  H01L31/075 ,  H01L31/1884 ,  Y02E10/548

Abstract: A device and method for fabricating a photovoltaic device includes forming a double layer transparent conductive oxide on a transparent substrate. The double layer transparent conductive oxide includes forming a doped electrode layer on the substrate, and forming a buffer layer on the doped electrode layer. The buffer layer includes an undoped or p-type doped intrinsic form of a same material as the doped electrode layer. A light-absorbing semiconductor structure includes a p-type semiconductor layer on the buffer layer, an intrinsic layer and an n-type semiconductor layer.

公开(公告)号：US20180145196A1

公开(公告)日：2018-05-24

申请号：US15821026

申请日：2017-11-22

Applicant: LG Electronics Inc.

Inventor： Jungmin HA ,  Sungyeon CHO ,  Sangwook PARK

IPC: H01L31/048 ,  H01L31/0236 ,  H01L31/0352 ,  H01L31/18

CPC classification number: H01L31/048 ,  H01L31/022425 ,  H01L31/02363 ,  H01L31/0352 ,  H01L31/03685 ,  H01L31/0747 ,  H01L31/1824 ,  H01L31/1868 ,  Y02E10/545 ,  Y02E10/548 ,  Y02P70/521

Abstract: Disclosed is a solar cell including a semiconductor substrate having a first surface and a second surface that is opposite the first surface, each of which includes a first edge area, a second edge area, and a cell area located between the first and second edge areas, a first passivation layer formed on the cell area of the first surface of the semiconductor substrate, a first conductive semiconductor layer disposed on the first passivation layer, and a first electrode disposed on the first conductive semiconductor layer. The first edge area of the first surface of the semiconductor substrate is exposed.

公开(公告)号：US09966486B2

公开(公告)日：2018-05-08

申请号：US14123462

申请日：2012-05-30

Applicant: Kyung Eun Park

Inventor： Kyung Eun Park

IPC: H01L31/0352 ,  H01L31/032 ,  H01L31/068 ,  H01L31/0749 ,  H01L31/075 ,  H01L31/061 ,  H01L31/0468 ,  H01L31/18

CPC classification number: H01L31/035281 ,  H01L31/0322 ,  H01L31/0468 ,  H01L31/061 ,  H01L31/068 ,  H01L31/0749 ,  H01L31/075 ,  H01L31/1804 ,  H01L31/1884 ,  Y02E10/541 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

Abstract: Disclosed are a solar cell apparatus and a method of fabricating the same. The solar cell apparatus includes a substrate, a first electrode layer on the substrate, a plurality of light absorbing columns on the first electrode layer, and a second electrode layer on the light absorbing columns.

公开(公告)号：US09911892B2

公开(公告)日：2018-03-06

申请号：US14370598

申请日：2013-01-03

Applicant: Linwei Yu ,  Pere Roca I Cabarrocas

Inventor： Linwei Yu ,  Pere Roca I Cabarrocas

IPC: H01L31/042 ,  H01L31/075 ,  B82Y40/00 ,  H01L21/00 ,  H01L21/20 ,  H01L31/18 ,  B82Y10/00 ,  H01L21/02 ,  H01L31/0352 ,  H01L29/06 ,  H01L29/16 ,  H01L29/161 ,  H01L29/24 ,  H01L31/077 ,  H01L29/167 ,  B82Y30/00

CPC classification number: H01L31/182 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  H01L21/02422 ,  H01L21/02472 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02603 ,  H01L21/0262 ,  H01L21/02645 ,  H01L21/02653 ,  H01L29/0665 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/16 ,  H01L29/161 ,  H01L29/167 ,  H01L29/24 ,  H01L31/035227 ,  H01L31/035272 ,  H01L31/035281 ,  H01L31/075 ,  H01L31/077 ,  H01L31/18 ,  H01L31/1804 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

Abstract: A method for the low-temperature production of radial electronic junction semiconductor nanostructures on a substrate, includes: a) forming on the substrate, metal aggregates capable of electronically doping a first semiconductor material; b) growing, in the vapor phase, doped semiconductor nanowires in the presence of one or more non-dopant precursor gases of the first semiconductor material, the substrate being heated to a temperature at which the metal aggregates are in the liquid phase, the growth of the doped semiconductor nanowires in the vapor phase being catalyzed by the metal aggregates; c) rendering the residual metal aggregates inactive; and d) the chemical vapor deposition, in the presence of one or more precursor gases and a dopant gas, of at least one thin film of a second semiconductor material so as to form at least one radial electronic junction nanostructure between the nanowire and the at least one doped thin film.

公开(公告)号：US09911888B2

公开(公告)日：2018-03-06

申请号：US14976798

申请日：2015-12-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Tze-Chiang Chen ,  Augustin J. Hong ,  Jeehwan Kim ,  Devendra K. Sadana

IPC: H01L29/04 ,  H01L29/10 ,  H01L31/00 ,  H01L31/077 ,  C23C16/50 ,  H01L31/20 ,  H01L21/02 ,  C23C16/02 ,  H01L31/0216 ,  H01L31/0368 ,  H01L31/0376 ,  H01L31/0392 ,  C23C16/455 ,  C23C16/515 ,  H01L31/0224 ,  H01L31/065 ,  H01L31/18 ,  H01L31/056

CPC classification number: H01L31/077 ,  C23C16/0272 ,  C23C16/45523 ,  C23C16/45557 ,  C23C16/50 ,  C23C16/515 ,  H01L21/02532 ,  H01L21/0262 ,  H01L31/02167 ,  H01L31/022466 ,  H01L31/022475 ,  H01L31/022483 ,  H01L31/03682 ,  H01L31/03687 ,  H01L31/03762 ,  H01L31/03921 ,  H01L31/056 ,  H01L31/065 ,  H01L31/1816 ,  H01L31/20 ,  Y02E10/52 ,  Y02E10/546 ,  Y02E10/548

Abstract: A method for forming a photovoltaic device includes providing a substrate. A layer is deposited to form one or more layers of a photovoltaic stack on the substrate. The depositing of the amorphous layer includes performing a high power flash deposition for depositing a first portion of the layer. A low power deposition is performed for depositing a second portion of the layer.

公开(公告)号：US20180013021A1

公开(公告)日：2018-01-11

申请号：US15706605

申请日：2017-09-15

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Motohide KAI

IPC: H01L31/0376 ,  H01L31/0236 ,  H01L31/0216 ,  H01L31/0224 ,  H01L31/20 ,  H01L31/0747

CPC classification number: H01L31/03762 ,  H01L31/02167 ,  H01L31/02168 ,  H01L31/022441 ,  H01L31/02363 ,  H01L31/0747 ,  H01L31/202 ,  Y02E10/548 ,  Y02P70/521

Abstract: A solar cell includes: a semiconductor substrate formed of n-type crystalline silicon; a first stack formed of amorphous silicon in a first region on a first principle surface of the semiconductor substrate; a second stack formed of amorphous silicon in a second region different from the first region on the first principle surface; and a third stack formed of amorphous silicon on a second principle surface of the semiconductor substrate opposite from the first principle surface. The second stack has an oxygen concentration that is higher than that of the first stack.