公开(公告)号：US12242755B2

公开(公告)日：2025-03-04

申请号：US18434616

申请日：2024-02-06

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Zhenming Zhou ,  Murong Lang ,  Ching-Huang Lu ,  Nagendra Prasad Ganesh Rao

IPC: G06F3/06

Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including: receiving a request to perform a read operation on a segment of the memory device; determining whether a temperature offset value of the segment satisfies a threshold criterion associated with a program erase cycle count of the segment; and responsive to determining that the temperature offset value satisfies the threshold criterion, performing a corrective read operation on the segment of the memory device, wherein a sense time parameter of the corrective read operation is modified according to the temperature offset value and the program erase cycle count.

公开(公告)号：US12242734B2

公开(公告)日：2025-03-04

申请号：US18237668

申请日：2023-08-24

Applicant: Micron Technology, Inc.

Inventor： Guang Hu ,  Ting Luo

IPC: G06F3/06

Abstract: A system comprises a memory device including a plurality of management units and a processing device. The processing device is operatively coupled with the memory device and configured to place the plurality of management units into a first protective state by erasing the plurality of management units, identify a cursor satisfying a cursor definition, identify a subset of the plurality of management units based on a location, on the memory device, referenced by the cursor, and place a selected management unit of the subset of the plurality of management units into a second protective state by programming a protective data pattern to the selected management unit.

公开(公告)号：US12242726B2

公开(公告)日：2025-03-04

申请号：US17892539

申请日：2022-08-22

Applicant: Micron Technology, Inc.

Inventor： Sujeet V. Ayyapureddi

IPC: G06F3/06

Abstract: Methods, systems, and devices for capability messaging for memory operations across banks with multiple page access are described. Techniques are described for a memory system to use a same bank for first and second access operations of data associated with an access command. The data corresponding to the second access operation may be communicated after the data corresponding to the first access operation on the same data channels. Techniques are further described for including one or more additional access commands with the access command that use other banks. Techniques are further described for interleaving data sets communicated as a result of the access commands and for abutting data sets based on parameters obtained by the memory device. Techniques are further described for the generation and performance of internal access commands in accordance with a data transfer type indicated by a host system.

公开(公告)号：US12242385B2

公开(公告)日：2025-03-04

申请号：US17647579

申请日：2022-01-10

Applicant: Micron Technology, Inc.

Inventor： Bryan Hornung ,  Tony M. Brewer

IPC: G06F12/10

Abstract: Methods, systems, and devices for virtual addresses for a memory system are described. In some examples, a virtual address space may be shared across a plurality of memory devices that are included in one or more domains. The memory devices may be able to communicate with each other directly. For example, a first memory device may be configured to generate a data packet that includes an identifier and an address that is included in the shared virtual address space. The data packet may be transmitted to a second memory device based on the identifier, and the second memory device may access a physical address based on the address.

公开(公告)号：US20250072079A1

公开(公告)日：2025-02-27

申请号：US18947497

申请日：2024-11-14

Applicant: Micron Technology, Inc.

Inventor： Thomas M. Graettinger

IPC: H01L29/66 ,  H01L27/06 ,  H10B63/00 ,  H10N70/00 ,  H10N70/20

Abstract: The present disclosure includes methods for replacement gate formation in memory, and apparatuses and systems including memory formed accordingly. An embodiment includes forming a first oxide material in an opening through alternating layers of a second oxide material and a nitride material. An array of openings can be formed through the first oxide material formed in the opening. The layers of the nitride material can be removed. A metal material can be formed in voids resulting from the removal of the layers of the nitride material.

公开(公告)号：US20250069683A1

公开(公告)日：2025-02-27

申请号：US18782624

申请日：2024-07-24

Applicant: Micron Technology, Inc.

Inventor： Luyen Vu ,  Alex Sheng-Huang Lee ,  Wei Lic Chew

IPC: G11C29/00

Abstract: A memory device includes a memory array includes memory cells grouped into one or more address ranges. Control logic is coupled to the memory array and configured to detect one or more errors associated with one or more stored data items corresponding to a first address range of one or more address ranges. The control logic can determine that a number of the one or more stored data items exceeds a number of redundant memory locations for the first address space. Control logic can remap an association of a first memory address of at least one of the stored data items from a first address within the first address space to a second address in a second address range, where the second address range includes one or more available redundant memory locations.

公开(公告)号：US20250069675A1

公开(公告)日：2025-02-27

申请号：US18774642

申请日：2024-07-16

Applicant: Micron Technology, Inc.

Inventor： Daniel Zhang ,  Yu-Chung Lien ,  Peng Zhang ,  Murong Lang ,  Zhenming Zhou

IPC: G11C16/34 ,  G11C16/10 ,  G11C16/32

Abstract: The disclosure configures a memory sub-system controller to use prior read verify operations to selectively apply enhancements to read window budgets (RWB). The controller receives a request to perform a memory operation on data stored in an individual memory component of a set of memory components. The controller accesses RWB tracking information associated with the individual memory component and determines that the tracking information associated with the individual memory component indicates a need for enhancing a RWB associated with the memory operation. The controller applies one or more enhancement processes to the individual memory component in response to determining that the tracking information associated with the individual memory component indicates the need for enhancing the RWB associated with the memory operation.

公开(公告)号：US20250069638A1

公开(公告)日：2025-02-27

申请号：US18944400

申请日：2024-11-12

Applicant: Micron Technology, Inc.

Inventor： John E. Riley ,  Joo-Sang Lee ,  Scott E. Smith

IPC: G11C11/406 ,  G11C11/4074

Abstract: Methods, systems, and devices for adjusting a refresh rate during a self-refresh state are described. A memory system may enter a self-refresh state and execute a first set of refresh operations on a set of rows of memory cells at the memory system according to a first rate. The memory system may determine, based on executing the first set of refresh operations, that a counter associated with the set of refresh operations satisfies a threshold for a second time while the memory system is in the self-refresh state. In response to the counter satisfying the threshold for the second time, a flip-flop circuit at the memory system may modify an output of the flip-flop circuit and the memory system may decrease the rate for executing the refresh operations to a second rate based on the modified output of the flip-flop circuit.

公开(公告)号：US20250068802A1

公开(公告)日：2025-02-27

申请号：US18787773

申请日：2024-07-29

Applicant: Micron Technology, Inc.

Inventor： Poorna Kale ,  Shashank Bangalore Lakshman ,  Pavana Prakash ,  Febin Sunny

IPC: G06F30/27 ,  G06F30/15

Abstract: Systems, methods, and apparatuses related to a network for behavior modeling are described. A network can include surveillance devices that are each configured to collect pedestrian behavior data corresponding to a geographic region and output local pedestrian behavior model updates to a municipal communication node for the geographic region. The municipal communication node is configured to receive the local pedestrian behavior model updates and output the local pedestrian behavior model updates to a global pedestrian behavior model to aggregate the local pedestrian behavior model updates. A processing device is coupled to the municipal communication node and is configured to output the global pedestrian behavior model to the municipal communication node. The municipal communication node is configured to output the global pedestrian behavior model to an automatic driver assistance system (ADAS) in a vehicle within the geographic region, wherein the vehicle operates based on the global pedestrian behavior model.

公开(公告)号：US20250068334A1

公开(公告)日：2025-02-27

申请号：US18948308

申请日：2024-11-14

Applicant: Micron Technology, Inc.

Inventor： Srinivasa Anuradha Bulusu ,  Akshaya Venkatakrishnan ,  Alaa Ali

IPC: G06F3/06

Abstract: Methods of reusing and/or repurposing microelectronic devices are disclosed. A method may include enabling a reuse mode on a memory device responsive to the memory device being fit for a secondary application. The method may further include reconfiguring the memory device responsive to enabling the reuse mode. Associated systems are also disclosed.