Aggregation over multiple 64-66 lanes
    161.
    发明授权
    Aggregation over multiple 64-66 lanes 有权
    多个64-66车道的聚集

    公开(公告)号:US07693226B1

    公开(公告)日:2010-04-06

    申请号:US11352806

    申请日:2006-02-13

    Applicant: William Lo

    Inventor: William Lo

    CPC classification number: G06F7/06

    Abstract: An aggregation channel for providing data communication for M data streams to N data streams comprises a first first-in, first-out (FIFO) buffer module that receives the M data streams and realigns them with each other based on respective alignment symbols. A lane mapping module receives the realigned M data streams from the first FIFO buffer module and routes predetermined ones of the M data streams to predetermined ones of the N data streams, wherein each of the N data streams receives at least one of the alignment characters. M is greater than N, N is greater than 1, and each of the M data streams includes an alignment symbol.

    Abstract translation: 用于向N个数据流提供用于M个数据流的数据通信的聚合信道包括基于相应的对准符号来接收M个数据流并将它们重新对准的第一先入先出(FIFO)缓冲器模块。 车道映射模块从第一FIFO缓冲器模块接收重新排列的M个数据流,并将预定的M个数据流路由到N个数据流中的预定数据流,其中N个数据流中的每一个接收至少一个对准字符。 M大于N,N大于1,并且M个数据流中的每一个包括对准符号。

    Apparatus and method for probing integrated circuits using polarization difference probing
    162.
    发明授权
    Apparatus and method for probing integrated circuits using polarization difference probing 有权
    使用偏振差探测探测集成电路的装置和方法

    公开(公告)号:US07659981B2

    公开(公告)日:2010-02-09

    申请号:US11261996

    申请日:2005-10-27

    CPC classification number: G01R31/307

    Abstract: A system for probing a DUT is disclosed, the system having a pulsed laser source, a CW laser source, beam optics designed to point a reference beam and a probing beam at the same location on the DUT, optical detectors for detecting the reflected reference and probing beams, and a collection electronics. The beam optics is a common-path polarization differential probing (PDP) optics. The common-path PDP optics divides the incident laser beam into two beams of orthogonal polarization—one beam simulating a reference beam while the other simulating a probing beam. Both reference and probing beams are pointed to the same location on the DUT. Due to the intrinsic asymmetry of a CMOS transistor, the interaction of the reference and probing beams with the DUT result in different phase modulation in each beam. This difference can be investigated to study the response of the DUT to the stimulus signal.

    Abstract translation: 公开了一种用于探测DUT的系统,该系统具有脉冲激光源,CW激光源,设计用于将DUT上的相同位置处的参考光束和探测光束指向的光束光学元件,用于检测反射参考的光学检测器和 探测梁和收集电子设备。 光束光学器件是公共路径偏振微分探测(PDP)光学器件。 共轨PDP光学器件将入射激光束分成模拟参考光束的两个正交偏振光束,另一个模拟探测光束。 参考和探测光束都指向DUT上相同的位置。 由于CMOS晶体管的固有不对称性,参考光束和探测光束与DUT的相互作用导致每个光束中的不同相位调制。 可以研究这种差异来研究DUT对刺激信号的响应。

    Alternative 1000BASE-T scrambler
    163.
    发明授权
    Alternative 1000BASE-T scrambler 有权
    备用1000BASE-T加扰器

    公开(公告)号:US07649855B1

    公开(公告)日:2010-01-19

    申请号:US10861802

    申请日:2004-06-04

    CPC classification number: H04L43/50 H04L69/323

    Abstract: A physical coding sublayer (PCS) device includes a first data scrambler, a second data scrambler, and a selector. The first data scrambler scrambles first data and implements a first scrambling cycle. The second data scrambler scrambles second data and implements a second scrambling cycle. The second data is different than the first data. The second scrambling cycle is shorter than the first scrambling cycle. The selector selects the first data scrambler to scramble the first data during normal operations. The selector selects the second data scrambler to scramble the second data during testing. The first data scrambler does not scramble the second data. The second data scrambler does not scramble the first data.

    Abstract translation: 物理编码子层(PCS)装置包括第一数据扰频器,第二数据扰频器和选择器。 第一数据扰频器对第一数据进行加扰并实现第一加扰周期。 第二数据扰频器加扰第二数据并实现第二加扰周期。 第二数据与第一数据不同。 第二加扰周期比第一加扰周期短。 选择器在正常操作期间选择第一数据扰频器来加扰第一数据。 选择器在测试期间选择第二数据扰频器来加扰第二数据。 第一数据加密器不占用第二数据。 第二数据扰频器不会扰乱第一数据。

    Method and apparatus for controlling data transfer between EEPROM and a physical layer device
    164.
    发明授权
    Method and apparatus for controlling data transfer between EEPROM and a physical layer device 有权
    用于控制EEPROM和物理层设备之间的数据传输的方法和装置

    公开(公告)号:US07640370B1

    公开(公告)日:2009-12-29

    申请号:US11751593

    申请日:2007-05-21

    CPC classification number: G06F13/1684

    Abstract: An IEEE 802.3 compliant physical layer device provides efficient loading of configuration information of the physical layer device. The configuration information is written into a volatile memory in the physical layer device, and then uploaded to at least one EEPROM. The configuration information is downloaded to the volatile memory during startup of the physical layer device. The system controller can also directly access the EEPROMs, bypassing the volatile memory. By providing a bridge between the system controller and the EEPROMs and providing additional bits in the volatile memory of the physical layer device, the system controller can read and write the EEPROMs one byte at a time. During reset time, the content of the EERPOMs is written to registers in the physical layer device to configure the physical layer device.

    Abstract translation: 符合IEEE 802.3标准的物理层设备提供物理层设备的配置信息的高效加载。 配置信息被写入物理层设备中的易失性存储器中,然后上传到至少一个EEPROM。 配置信息在物理层设备启动期间被下载到易失性存储器。 系统控制器也可以直接访问EEPROM,绕过易失性存储器。 通过在系统控制器和EEPROM之间提供桥接器,并在物理层器件的易失性存储器中提供额外的位,系统控制器可以一次读取一个字节的EEPROM。 在复位时间内,将EERPOM的内容写入物理层设备的寄存器,配置物理层设备。

    Media and speed independent interface
    165.
    发明授权
    Media and speed independent interface 有权
    媒体和速度独立的界面

    公开(公告)号:US07593416B1

    公开(公告)日:2009-09-22

    申请号:US11156059

    申请日:2005-06-17

    Applicant: William Lo

    Inventor: William Lo

    CPC classification number: H04L12/413

    Abstract: A method for communicating network data of varying speeds comprises establishing a plurality of signal interconnections; storing a first mapping of XGMII signals onto the plurality of signal interconnections; storing a second mapping of GMII signals onto the plurality of signal interconnections; and storing a third mapping of MII signals onto the plurality of signal interconnections. Ones of the plurality of signal interconnections are mapped by each of the first, second, and third mappings. The method further comprises selecting one of the first, second, and third mappings and transmitting the network data over the plurality of signal interconnections using the selected one of the first, second, and third mappings.

    Abstract translation: 用于传送变化速度的网络数据的方法包括建立多个信号互连; 将XGMII信号的第一映射存储在所述多个信号互连上; 将GMII信号的第二映射存储到所述多个信号互连上; 以及将MII信号的第三映射存储在所述多个信号互连上。 多个信号互连的一部分由第一,第二和第三映射中的每一个映射。 该方法还包括:使用第一,第二和第三映射中的所选择的一个,选择第一,第二和第三映射之一并通过多个信号互连发送网络数据。

    Long-reach ethernet for 1000BASE-T and 10GBASE-T
    166.
    发明申请
    Long-reach ethernet for 1000BASE-T and 10GBASE-T 有权
    1000BASE-T和10GBASE-T的长距离以太网

    公开(公告)号:US20090080459A1

    公开(公告)日:2009-03-26

    申请号:US12330823

    申请日:2008-12-09

    Abstract: A physical-layer device (PHY) having corresponding methods comprises: a data rate module to select a data rate divisor N, where N is at least one of a positive integer, or a real number greater than, or equal to, 1; and a PHY core comprising a PHY transmit module to transmit first signals a data rate of M/N Gbps, and a PHY receive module to receive second signals at the data rate of MIN Gbps; wherein the first and second signals conform to at least one of 1000BASE-T, wherein M=1, and 10GBASE-T, wherein M=10.

    Abstract translation: 具有相应方法的物理层设备(PHY)包括:数据速率模块,用于选择数据速率除数N,其中N是大于或等于1的正整数或实数中的至少一个; 以及PHY核,其包括PHY发送模块,用于以M / N Gbps的数据速率发送第一信号,以及PHY接收模块,以接收第二信号的数据速率为MINGbps; 其中所述第一和第二信号符合1000BASE-T,其中M = 1和10GBASE-T中的至少一个,其中M = 10。

    Multi-speed serial interface for media access control and physical layer devices
    167.
    发明授权
    Multi-speed serial interface for media access control and physical layer devices 有权
    用于媒体访问控制和物理层设备的多速串行接口

    公开(公告)号:US07418514B1

    公开(公告)日:2008-08-26

    申请号:US11891930

    申请日:2007-08-14

    CPC classification number: H04L65/60 H04L49/3054 H04L49/352

    Abstract: A network device that operates in first and second serial gigabit interface modes involving data speed translation comprising a medium access control (MAC) device that transmits idle order sets. A physical layer (PHY) device receives the idle order sets and that switches from the first serial gigabit interface mode to the second serial gigabit interface mode if a first predetermined number of consecutive idle order sets are equal to a first idle order set.

    Abstract translation: 一种在涉及数据速度转换的第一和第二串行千兆接口模式下操作的网络设备,包括传输空闲命令集的介质访问控制(MAC)设备。 物理层(PHY)设备接收空闲订单集,并且如果第一预定数量的连续空闲订单集等于第一空闲订单集,则从第一串行千兆接口模式切换到第二串行千兆接口模式。

    Reduced pin gigabit media independent interface
    168.
    发明授权
    Reduced pin gigabit media independent interface 有权
    降低千兆以太网媒体独立接口

    公开(公告)号:US07415013B1

    公开(公告)日:2008-08-19

    申请号:US11447351

    申请日:2006-06-06

    Applicant: William Lo

    Inventor: William Lo

    CPC classification number: H04L49/40 H04L49/30 H04L49/351

    Abstract: A medium access control (MAC) device comprising an encoder that encodes a transmit control signal including one of a transmit enable signal in one half cycle of a clock signal and a transmit error signal in another half cycle of the clock signal. A control signal transmitter transmits the encoded transmit control signal. A data signal transmitter selectively transmits a transmit data signal including signaling data based on states of the transmit enable signal and the transmit error signal during the clock cycle.

    Abstract translation: 一种媒体访问控制(MAC)装置,包括:编码器,其对包括时钟信号的一个半周期中的发送使能信号和时钟信号的另一半周期中的发送误差信号之一的发送控制信号进行编码。 控制信号发射机发射编码的发射控制信号。 数据信号发射器在时钟周期期间基于发射使能信号和发射误差信号的状态选择性地发送包括信令数据的发射数据信号。

    Adaptive Speed Control for MAC-PHY Interfaces
    170.
    发明申请
    Adaptive Speed Control for MAC-PHY Interfaces 有权
    MAC-PHY接口的自适应速度控制

    公开(公告)号:US20070248118A1

    公开(公告)日:2007-10-25

    申请号:US11696476

    申请日:2007-04-04

    Abstract: Apparatus having corresponding methods and computer programs comprise a first first-in first-out buffer (FIFO) to receive and store data from a media access controller (MAC); a physical-layer device (PHY) to transmit a signal representing the data; and a control circuit comprising a read circuit to transfer the data from the first FIFO to the PHY, and a transmit pause circuit to transmit a pause frame to the MAC when an amount of the data stored in the first FIFO exceeds a predetermined threshold.

    Abstract translation: 具有相应方法和计算机程序的装置包括从媒体接入控制器(MAC)接收和存储数据的第一先进先出缓冲器(FIFO) 用于发送表示数据的信号的物理层设备(PHY); 以及控制电路,包括用于将数据从第一FIFO传送到PHY的读取电路,以及发送暂停电路,用于当存储在第一FIFO中的数据量超过预定阈值时,向MAC发送暂停帧。

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