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公开(公告)号:US11240530B2
公开(公告)日:2022-02-01
申请号:US17081267
申请日:2020-10-27
Inventor: Takashi Hashimoto , Kiyofumi Abe , Tadamasa Toma , Takahiro Nishi , Ryuichi Kanoh
IPC: H04N19/52 , H04N19/159 , H04N19/182
Abstract: An encoder includes: circuitry; and memory, in which using the memory, the circuitry, in affine motion compensation prediction in inter prediction for a current block, places a limit on a range within which motion estimation or motion compensation is performed, and performs the motion compensation for the current block.
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公开(公告)号:US11206402B2
公开(公告)日:2021-12-21
申请号:US17125113
申请日:2020-12-17
Inventor: Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Yusuke Kato
IPC: H04N19/13 , H04N19/70 , H04N19/176 , H04L29/06 , H04N19/184
Abstract: An encoder includes memory and circuitry which: (i) encodes an image block; (ii) when encoding the image block: binarizes coefficient information indicating coefficients of the image block; and controls whether to apply arithmetic encoding to a binary data string obtained by binarizing the coefficient information; and (iii) when binarizing the coefficient information: binarizes the coefficient information according to a first syntax structure when arithmetic encoding is applied to the data string and a predetermined condition is not satisfied; binarizes the coefficient information according to a second syntax structure when arithmetic encoding is applied to the data string and the predetermined condition is satisfied; binarizes the coefficient information according to the second syntax structure when no arithmetic encoding is applied to the data string; and subtracts 1 from a value of an initial non-zero coefficient when no arithmetic encoding is applied to the data string when encoding the image block.
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公开(公告)号:US11166032B2
公开(公告)日:2021-11-02
申请号:US17080141
申请日:2020-10-26
Inventor: Alec Hodgkinson , Luca Rigazio , Takahiro Nishi , Kiyofumi Abe , Ryuichi Kanoh , Tadamasa Toma
IPC: H04N19/184 , H04N19/46 , H04N19/85 , H04N19/136 , H04N19/124 , G06N3/08
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry: encodes an original image and decodes the original image encoded, to generate a first bitstream and a local decoded image; encodes supplemental information and decodes the encoded supplemental information, to generate a second bitstream and local decoded supplemental information; inputs data based on the local decoded image and the local decoded supplemental information to a post processing network which is a neural network, to cause a reconstructed image to be output from the post processing network, the reconstructed image corresponding to the original image and being to be used to encode a following original image which follows the original image; and concatenates the first bitstream and the second bitstream to generate a concatenated bitstream.
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公开(公告)号:US11153596B2
公开(公告)日:2021-10-19
申请号:US16696249
申请日:2019-11-26
Inventor: Ryuichi Kanoh , Tadamasa Toma , Takahiro Nishi , Kiyofumi Abe , Takashi Hashimoto
IPC: H04N19/52 , H04N19/105 , H04N19/159 , H04N19/176 , H04N19/186
Abstract: Provided is an encoder that achieves further improvement. The encoder includes processing circuitry and memory. Using the memory, the processing circuitry: obtains two prediction images from two reference pictures; derives a luminance gradient value of each pixel position in each of the two prediction images; derives a luminance local motion estimation value of each pixel position in a current block; generates a luminance final prediction image using a luminance value and the luminance gradient value in each of the two prediction images, and the luminance local motion estimation value of the current block; and generates a chrominance final prediction image using at least one of the luminance gradient value of each of the two prediction images or the luminance local motion estimation value of the current block, and chrominance of each of the two prediction images.
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公开(公告)号:US11134270B2
公开(公告)日:2021-09-28
申请号:US16194586
申请日:2018-11-19
Inventor: Chong Soon Lim , Han Boon Teo , Takahiro Nishi , Tadamasa Toma , Ru Ling Liao , Sughosh Pavan Shashidhar , Hai Wei Sun
IPC: H04N19/597 , H04N19/159 , H04N5/00 , H04N19/46 , H04N19/176 , G06T5/00 , H04N19/85
Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
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公开(公告)号:US11134260B2
公开(公告)日:2021-09-28
申请号:US16860367
申请日:2020-04-28
Inventor: Takashi Hashimoto , Kiyofumi Abe , Tadamasa Toma , Takahiro Nishi , Ryuichi Kanoh
IPC: H04N19/51 , H04N19/433
Abstract: An encoder that encodes a picture to generate a coded stream includes: circuitry and a memory coupled to the circuitry. The circuitry performs, using the memory: generating a prediction image of a current block included in a current picture by referring to a first region included in a reference picture different from the current picture; operating a bi-directional optical flow process to correct the prediction image by referring to a second region included in the first region, and not operating the bi-directional optical flow process in response to the second region not being included in the first region; and encoding the current block based on the prediction image.
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公开(公告)号:US11128928B2
公开(公告)日:2021-09-21
申请号:US16558466
申请日:2019-09-03
Inventor: Noritaka Iguchi , Tadamasa Toma , Hisaya Katou
IPC: H04N21/643 , H04N21/43 , H04L7/00 , H04N21/236 , H04N21/2381 , H04N21/242 , H04N21/262 , H04N21/438 , H04N21/61
Abstract: A transmission method includes generating one or more frames for content transfer using IP (Internet Protocol) packets, and transmitting the one or more generated frames by broadcast. Each of the one or more frames contains a plurality of second transfer units, each of the plurality of second transfer units contains one or more first transfer units, and each of the one or more first transfer units contains at least one of the IP packets. An object IP packet of the IP packets which is stored in a first transfer unit positioned at a head in the one or more frames contains reference clock information that indicates time for reproduction of the content in data structure different from data structure of an MMT (MPEG Media Transport) packet, and header compression processing on the object IP packet is omitted.
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公开(公告)号:US11128883B2
公开(公告)日:2021-09-21
申请号:US16799315
申请日:2020-02-24
Inventor: Tadamasa Toma , Takahiro Nishi , Kiyofumi Abe , Ryuichi Kanoh
IPC: H04N19/52 , H04N19/157 , H04N19/176 , H04N19/182 , H04N19/59
Abstract: Provided is an encoder includes: circuitry; and memory, in which the circuitry: determines which mode is used to perform a prediction process, among modes including a first mode in which the prediction process is performed based on a motion vector of each block in a video and a second mode in which the prediction process is performed based on a motion vector of each sub-block obtained by splitting the block; when the prediction process is performed in the first mode, determines whether to perform a correction process on a prediction image using a spatial gradient of pixel values in the prediction image obtained by performing the prediction process, and performs the correction process when it is determined to perform the correction process; and when the prediction process is performed in the second mode, does not perform the correction process.
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公开(公告)号:US11127169B2
公开(公告)日:2021-09-21
申请号:US16211910
申请日:2018-12-06
Inventor: Toshiyasu Sugio , Takahiro Nishi , Tadamasa Toma , Toru Matsunobu , Satoshi Yoshikawa , Tatsuya Koyama
Abstract: A three-dimensional data encoding method includes: extracting, from first three-dimensional data, second three-dimensional data having an amount of a feature greater than or equal to a threshold; and encoding the second three-dimensional data to generate first encoded three-dimensional data. For example, the three-dimensional data encoding method may further include encoding the first three-dimensional data to generate the second encoded three-dimensional data.
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公开(公告)号:US11109031B2
公开(公告)日:2021-08-31
申请号:US16240055
申请日:2019-01-04
Inventor: Takahiro Nishi , Tadamasa Toma
IPC: H04B1/66 , H04N7/12 , H04N11/02 , H04N11/04 , H04N19/126 , H04N19/176 , H04N19/137 , H04N19/517 , H04N19/119
Abstract: An image decoder includes: a processor; and a memory. Using the memory, the processor obtains motion vectors of sub-blocks obtained by splitting a current frame; determines, for each of processing blocks obtained by splitting the current frame, quantization control to be performed on the processing block; and inversely quantizes each of the processing blocks by the quantization control determined for the processing block.
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