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公开(公告)号:US11328962B2
公开(公告)日:2022-05-10
申请号:US17099613
申请日:2020-11-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chang-Yin Chen , Che-Cheng Chang , Chih-Han Lin
IPC: H01L29/49 , H01L29/78 , H01L21/8238 , H01L29/66 , H01L29/51 , H01L21/308 , H01L27/092 , H01L29/10 , H01L21/306 , H01L21/3065 , H01L29/423
Abstract: A method includes providing a structure having a substrate and a fin protruding from the substrate, forming a gate stack layer over the fin, and patterning the gate stack layer in forming a gate stack. The patterning of the gate stack layer simultaneously forms a passivation layer on sidewall surfaces of the gate stack. The method also includes removing a bottom portion of the passivation layer, thereby exposing a bottom portion of the gate stack, while a top portion of the passivation layer remains. The method further includes laterally etching the bottom portion of the gate stack, thereby shrinking a width of the bottom portion of the gate stack.
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公开(公告)号:US11217683B2
公开(公告)日:2022-01-04
申请号:US16732177
申请日:2019-12-31
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Che-Cheng Chang , Chih-Han Lin
IPC: H01L29/66 , H01L29/78 , H01L29/06 , H01L29/40 , H01L29/423 , H01L21/762
Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and a fin structure formed over the substrate. The semiconductor structure further includes an isolation structure formed around the fin structure and a gate structure formed across the fin structure. In addition, the gate structure includes a first portion formed over the fin structure and a second portion formed over the isolation structure, and the second portion of the gate structure includes an extending portion extending into the isolation structure.
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公开(公告)号:US11121130B2
公开(公告)日:2021-09-14
申请号:US16730576
申请日:2019-12-30
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Che-Cheng Chang , Chih-Han Lin , Horng-Huei Tseng
IPC: H01L27/088 , H01L23/31 , H01L29/06 , H01L21/8234 , H01L29/66 , H01L21/8238 , H01L27/092
Abstract: Structures and formation methods of a semiconductor device are provided. The method includes forming a first fin structure and a second fin structure over a substrate, and forming first, second and third dummy gate stacks over the substrate. The first dummy gate stack and the second dummy gate stack partially cover the first fin structure and the second fin structure respectively. The third dummy gate stack is between the first dummy gate stack and the second dummy gate stack. The method also includes partially removing the third dummy gate stack such that a semiconductor layer of the third dummy gate stack remains over the substrate, forming a protection layer over the semiconductor layer, and replacing the first dummy gate stack and second dummy gate stack with a first gate stack and a second gate stack, respectively.
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公开(公告)号:US11043408B2
公开(公告)日:2021-06-22
申请号:US16203987
申请日:2018-11-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Che-Cheng Chang , Chih-Han Lin
IPC: H01L21/764 , H01L27/092 , H01L21/8238 , H01L29/66 , H01L29/06
Abstract: A dummy gate layer is formed over a substrate. A patterned mask is formed over the dummy gate layer. The patterned mask includes an opening. The opening is etched into the dummy gate layer. The patterned mask serves as a protective mask as the opening is etched. A lateral etching process is performed to portions of the dummy gate layer laterally exposed by the opening. The lateral etching process etches away the dummy gate layer without substantially affecting the patterned mask. After the lateral etching process is performed, a dielectric material is formed in the opening. An air gap is formed in the dielectric material. After the air gap is formed, the patterned mask and portions of the dielectric material formed over the patterned mask are removed. The dummy gate layer is replaced with a metal-containing gate.
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公开(公告)号:US20210074859A1
公开(公告)日:2021-03-11
申请号:US17099456
申请日:2020-11-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Zhe-Hao Zhang , Tung-Wen Cheng , Che-Cheng Chang , Yung-Jung Chang , Chang-Yin Chen
IPC: H01L29/78 , H01L29/66 , H01L21/762 , H01L21/306 , H01L29/165 , H01L21/8234 , H01L29/08 , H01L27/088 , H01L21/311
Abstract: A fin field effect transistor (FinFET) device structure and method for forming FinFET device structure are provided. The FinFET structure includes a substrate and an isolation structure formed on the substrate. The FinFET structure also includes a fin structure extending above the substrate, and the fin structure is embedded in the isolation structure. The FinFET structure further includes an epitaxial structure formed on the fin structure, the epitaxial structure has a pentagon-like shape, and an interface between the epitaxial structure and the fin structure is lower than a top surface of the isolation structure.
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公开(公告)号:US20210066290A1
公开(公告)日:2021-03-04
申请号:US17097423
申请日:2020-11-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Che-Cheng Chang , Chih-Han Lin , Horng-Huei Tseng
IPC: H01L27/088 , H01L27/12 , H01L21/84 , H01L29/08 , H01L21/8234
Abstract: A method includes, in a first etching step, etching a semiconductor substrate to form first recesses in a first device region and second recesses in a second device regions simultaneously. A first semiconductor strip is formed between the first recesses. A second semiconductor strip is formed between the second recesses. In a second etching step, the semiconductor substrate in the second device region is etched to extend the second recesses. The first recesses and the second recesses are filled with a dielectric material to form first and second isolation regions in the first and second recesses, respectively. The first isolation regions and the second isolation regions are recessed. Portions of the semiconductor substrate in the first and the second device regions protrude higher than top surfaces of the respective first and second isolation regions to form a first and a second semiconductor fin, respectively.
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公开(公告)号:US20210036128A1
公开(公告)日:2021-02-04
申请号:US17066102
申请日:2020-10-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Bo-Feng Young , Che-Cheng Chang , Mu-Tsang Lin , Tung-Wen Cheng , Zhe-Hao Zhang
Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate electrode over the semiconductor substrate. The semiconductor device structure also includes a source/drain structure adjacent to the gate electrode. The semiconductor device structure further includes a spacer element over a sidewall of the gate electrode, and the spacer element has an upper portion having a first exterior surface and a lower portion having a second exterior surface. Lateral distances between the first exterior surface and the sidewall of the gate electrode are substantially the same. Lateral distances between the second exterior surface and the sidewall of the gate electrode increase along a direction from a top of the lower portion towards the semiconductor substrate.
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公开(公告)号:US20210020496A1
公开(公告)日:2021-01-21
申请号:US17062822
申请日:2020-10-05
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Che-Cheng Chang , Chih-Han Lin
IPC: H01L21/768 , H01L23/485 , H01L29/417 , H01L23/522 , H01L23/528 , H01L29/66 , H01L29/78
Abstract: A semiconductor device structure and method for forming the same are provided. The semiconductor device structure includes a first metal layer formed over a substrate and a dielectric layer formed over the first metal layer. The semiconductor device structure further includes an adhesion layer formed in the dielectric layer and over the first metal layer and a second metal layer formed in the dielectric layer. The second metal layer is electrically connected to the first metal layer, and a portion of the adhesion layer is formed between the second metal layer and the dielectric layer. The adhesion layer includes a first portion lining with a top portion of the second metal layer, and the first portion has an extending portion along a vertical direction.
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公开(公告)号:US20210013315A1
公开(公告)日:2021-01-14
申请号:US17038114
申请日:2020-09-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Che-Cheng Chang , Chih-Han Lin , Horng-Huei Tseng
IPC: H01L29/417 , H01L29/78 , H01L29/66 , H01L21/265 , H01L21/324 , H01L21/768
Abstract: A semiconductor device and method of manufacture are provided. A source/drain region is formed next to a spacer, which is adjacent to a gate electrode. An implantation is performed through an implantation mask into the source/drain region as well as the first spacer, forming an implantation region within the spacer.
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公开(公告)号:US20200312985A1
公开(公告)日:2020-10-01
申请号:US16902190
申请日:2020-06-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Che-Cheng Chang , Jui-Ping Chuang , Chen-Hsiang Lu , Yu-Cheng Liu , Wei-Ting Chen
IPC: H01L29/66 , H01L29/78 , H01L21/8238 , H01L27/092 , H01L29/06 , H01L29/423 , H01L29/08 , H01L29/16 , H01L29/161 , H01L29/165 , H01L29/24 , H01L29/267 , H01L29/49 , H01L29/51 , H01L21/311 , H01L21/762
Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.
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