Structure and formation method of semiconductor device with gate stacks

    公开(公告)号:US11121130B2

    公开(公告)日:2021-09-14

    申请号:US16730576

    申请日:2019-12-30

    Abstract: Structures and formation methods of a semiconductor device are provided. The method includes forming a first fin structure and a second fin structure over a substrate, and forming first, second and third dummy gate stacks over the substrate. The first dummy gate stack and the second dummy gate stack partially cover the first fin structure and the second fin structure respectively. The third dummy gate stack is between the first dummy gate stack and the second dummy gate stack. The method also includes partially removing the third dummy gate stack such that a semiconductor layer of the third dummy gate stack remains over the substrate, forming a protection layer over the semiconductor layer, and replacing the first dummy gate stack and second dummy gate stack with a first gate stack and a second gate stack, respectively.

    Method of forming FinFET devices with embedded air gaps

    公开(公告)号:US11043408B2

    公开(公告)日:2021-06-22

    申请号:US16203987

    申请日:2018-11-29

    Abstract: A dummy gate layer is formed over a substrate. A patterned mask is formed over the dummy gate layer. The patterned mask includes an opening. The opening is etched into the dummy gate layer. The patterned mask serves as a protective mask as the opening is etched. A lateral etching process is performed to portions of the dummy gate layer laterally exposed by the opening. The lateral etching process etches away the dummy gate layer without substantially affecting the patterned mask. After the lateral etching process is performed, a dielectric material is formed in the opening. An air gap is formed in the dielectric material. After the air gap is formed, the patterned mask and portions of the dielectric material formed over the patterned mask are removed. The dummy gate layer is replaced with a metal-containing gate.

    Fin Structure and Method of Forming Same Through Two-Step Etching Processes

    公开(公告)号:US20210066290A1

    公开(公告)日:2021-03-04

    申请号:US17097423

    申请日:2020-11-13

    Abstract: A method includes, in a first etching step, etching a semiconductor substrate to form first recesses in a first device region and second recesses in a second device regions simultaneously. A first semiconductor strip is formed between the first recesses. A second semiconductor strip is formed between the second recesses. In a second etching step, the semiconductor substrate in the second device region is etched to extend the second recesses. The first recesses and the second recesses are filled with a dielectric material to form first and second isolation regions in the first and second recesses, respectively. The first isolation regions and the second isolation regions are recessed. Portions of the semiconductor substrate in the first and the second device regions protrude higher than top surfaces of the respective first and second isolation regions to form a first and a second semiconductor fin, respectively.

    Structure and Formation Method of Semiconductor Device Structure with Gate Stack

    公开(公告)号:US20210036128A1

    公开(公告)日:2021-02-04

    申请号:US17066102

    申请日:2020-10-08

    Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate electrode over the semiconductor substrate. The semiconductor device structure also includes a source/drain structure adjacent to the gate electrode. The semiconductor device structure further includes a spacer element over a sidewall of the gate electrode, and the spacer element has an upper portion having a first exterior surface and a lower portion having a second exterior surface. Lateral distances between the first exterior surface and the sidewall of the gate electrode are substantially the same. Lateral distances between the second exterior surface and the sidewall of the gate electrode increase along a direction from a top of the lower portion towards the semiconductor substrate.

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