Abstract:
A communication method and apparatus that uses modulation of post-conduction oscillation frequency in switching converters is provided. The apparatus may include a converter having a magnetic element having a primary winding and a secondary winding, a first switch, a control circuit configured to repeatedly activate the first switch to couple an input voltage source to the primary winding to store electrical energy in the magnetic element, and a diode coupled to the secondary winding, said diode configured to couple the secondary winding to a load to deliver the electrical energy stored in the magnetic element, and a communication apparatus having a second switch, a first modulator capacitor coupled to the secondary winding, a first transmitter configured to activate the second switch in accordance with a first input signal, and a first receiver configured to detect a post-conduction oscillation frequency of a voltage signal at the primary or secondary windings.
Abstract:
A capacitive parametric zero crossing detection circuit has a nonlinear voltage controlled capacitive device coupled to an input voltage to convert a zero crossing current pulse into zero crossing voltage signal.
Abstract:
Employed within an LED driver operating from the AC power line, the invention controls both input current and output power. With this regulation circuit, input current appears purely resistive, precisely tracking the input voltage waveshape. At the same time, it provides good line regulation and inherent phase dimmer compatibility, requiring no special circuitry to detect and handle a dimmer.
Abstract:
An LED driver circuit for controlling direct current supplied to a plurality of serially connected segments of Light Emitting Diodes (LEDs) is disclosed. In one embodiment, the LED driver circuit comprises a self-commutating circuit, which comprises a plurality of current control elements, each current control element having two ends, a first end connected to a different end of each segment along the plurality of serially connected segments of LEDs and a second end connected to a path to ground. The path to ground comprises a sense resistor and the path to ground is shared by the second end of each current control element. Each current control element is coupled to an adjacent current control element by a cross-regulation circuit and controlled by a signal from an adjacent current control element.
Abstract:
A system and method transmit a data stream from a source to a destination over a communication channel. A transmitter includes devices for processing inputs to assemble data packets for the data stream, and a multiplexer for assembling a data frame to be transmitted over the communication channel, in which each data frame has at least one fixed slot. The multiplexer sets at least one freely allocatable time slot in each data frame. Retransmission control devices connected to the multiplexer retransmit a specific data packet which is not properly received by the destination, using one of the freely allocatable slots.
Abstract:
Clock speed is controlled based upon the supply voltage to a digital device. When the supply voltage is below a reference voltage the clock speed will be slower than if the supply voltage is above the reference voltage. A phase-lock-loop (PLL) may be used to generate a higher frequency that is an integer multiple of a reference oscillator. The clock speed will be proportional to the frequency multiplication of the PLL when the faster clock speed is selected. A multiplexer is used to switch between different frequency sources, and a timer can be used to insure stable operation of the PLL. A status configuration register has status and control bits for indicating and controlling operation of the clock speed control. A universal serial bus (USB) device can operate at a slower clock with reduced operating voltage, and at a faster clock with increased operating voltage.
Abstract:
A microcontroller apparatus is provided with an instruction set for manipulating the behavior of the microcontroller. The apparatus and system is provided that enables a linearized address space that makes modular emulation possible. Direct or indirect addressing is possible through register files or data memory. Special function registers, including the Program Counter (PC) and Working Register (W), are mapped in the data memory. An orthogonal (symmetrical) instruction set makes possible any operation on any register using any addressing mode. Consequently, two file registers to be used to some two operand instructions. This allows data to be moved directly between two registers without going through the W register. Thus, increasing performance and decreasing program memory usage.
Abstract:
The present invention relates generally to functional pathway configurations at the interfaces between integrated circuits (ICs) and the circuit assemblies with which the ICs communicate. More particularly, the present invention relates generally to the functional pathway configuration at the interface between a semiconductor device (e.g., computer chips like microcontrollers, microprocessors, application specific integrated circuits (ASIC), programmable gate arrays (PGA) and other devices and/or combinations thereof) and the circuitry of a system including the chip. Even more particularly, the present invention relates to a 14-pin microcontroller functional pathway configuration for the interface between the microcontroller and a system in which the microcontroller is embedded to support infrared communications.
Abstract:
An instruction set is provided that features multiple instructions and various address modes to deliver a mixture of flexible microcontroller-like instructions and specialized digital signal processing (“DSP”) execute instructions from a single instruction stream. A subset of instructions of the instruction set can be executed by a processor. Similarly, another subset of the instructions can be utilized by the digital signal processor. A software application can thus take advantage of digital signal processing capabilities in the same program, obviating the need for separate programs for separate processors.
Abstract:
A loadable counter circuit which is able to perform multiple contiguous counts. The loadable counter circuit uses a counter for monitoring a number of specified events. A data storage device is coupled to the counter for loading the counter with counter values for each of the contiguous counts. A control logic circuit is coupled to the counter and to the data storage circuit for loading the counter and the data storage device with the counter values.