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公开(公告)号：US20210081147A1
公开(公告)日：2021-03-18
申请号：US17105511
申请日：2020-11-26
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang
Abstract: A method for performing storage control in a storage server may include: regarding any memory device of a plurality of memory devices installed at the storage server, assigning a channel of multiple channels within the memory device for access control corresponding to a thread of a plurality of threads running on the storage server, wherein the storage server configures the plurality of memory devices to form a RAID of the storage server; and during storing a series of logical access units (LAUs) into the RAID, writing information into respective sets of pages of the plurality of memory devices as pages in a LAU of the series of LAUs according to a predetermined arrangement rule, to make the respective sets of pages be sequentially written into the plurality of memory devices respectively with aid of the assignment of the channel of the multiple channels to the thread. Associated apparatus are provided.
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公开(公告)号：US20210081126A1
公开(公告)日：2021-03-18
申请号：US17106192
申请日：2020-11-30
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang , Wen-Long Wang
Abstract: A method for performing data-accessing management in a storage server and associated apparatus such as a host device, a storage device, etc. are provided. The method includes: in response to a client request of writing a first set of data into the storage server, utilizing the host device within the storage server to trigger broadcasting an internal request corresponding to the client request toward each storage device of a plurality of storage devices within the storage server; and in response to the internal request corresponding to the client request, utilizing said each storage device of the plurality of storage devices to search for the first set of data in said each storage device to determine whether the first set of data has been stored in any storage device, for controlling the storage server completing the client request without duplication of the first set of data within the storage server.
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公开(公告)号：US10811104B2
公开(公告)日：2020-10-20
申请号：US16178612
申请日：2018-11-02
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang
Abstract: A method for reading data stored in a flash memory includes at least the following steps: controlling the flash memory to perform a plurality of read operations upon a plurality of memory cells included in the flash memory; obtaining a plurality of bit sequences read from the memory cells, respectively, wherein the read operations read bits of a predetermined bit order from the memory cells by utilizing different control gate voltage settings; and determining readout information of the memory cells according to binary digit distribution characteristics of the bit sequences.
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公开(公告)号：US10771091B2
公开(公告)日：2020-09-08
申请号：US16251033
申请日：2019-01-17
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang , Hong-Jung Hsu
Abstract: A flash memory storage management method includes: providing a flash memory module including single-level-cell (SLC) blocks and at least one multiple-level-cell block such as MLC block, TLC block, or QLC block; classifying data to be programmed into groups of data; respectively executing SLC programing and RAID-like error code encoding to generate corresponding parity check codes, to program the groups of data and corresponding parity check codes to the SLC blocks; when completing program of the SLC blocks, performing an internal copy to program the at least one multiple-level-cell block by sequentially reading and writing the groups of data and corresponding parity check codes from the SLC blocks to the multiple-level-cell block according to a storage order of the SLC blocks.
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公开(公告)号：US10762007B2
公开(公告)日：2020-09-01
申请号：US16048348
申请日：2018-07-30
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang
Abstract: A storage device and an interface chip thereof are provided, wherein the interface chip can be applied to the storage device. The interface chip comprises a slave interface circuit, a master interface circuit, and a control circuit. The storage device comprises a memory controller and a non-volatile (NV) memory, and the NV memory comprises a plurality of NV memory chips. The slave interface circuit is arranged for coupling the interface chip to the memory controller. The master interface circuit is arranged for coupling the interface chip to a set of NV memory chips within the plurality of NV memory chips. A hierarchical architecture in the storage device comprises the memory controller, the interface chip, and the set of NV memory chips. The control circuit is arranged for controlling operations of the interface chip.
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Patent Agency Ranking
公开(公告)号：US20200233745A1
公开(公告)日：2020-07-23
申请号：US16841688
申请日：2020-04-07
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang , Hong-Jung Hsu , Jian-Dong Du
Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.
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公开(公告)号：US20200226021A1
公开(公告)日：2020-07-16
申请号：US16828893
申请日：2020-03-24
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang
Abstract: The present invention provides a decoding method of a flash memory controller, wherein the decoding method includes the steps of: reading first data from a flash memory module; decoding the first data, and recording at least one specific address of the flash memory module according to decoding results of the first data, wherein said at least one specific address corresponds to a bit having high reliability errors (HRE) of the first data; reading second data from the flash memory module; and decoding the second data according to said at least one specific address.
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188.发明授权公开(公告)号：US10679709B2
公开(公告)日：2020-06-09
申请号：US16228007
申请日：2018-12-20
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang
Abstract: A method for reading data stored in a flash memory. The flash memory comprises a plurality of memory cells and each memory cell has a particular threshold voltage. The method includes: obtaining a first threshold voltage distribution representing threshold voltages of a first group of the memory cells; obtaining a second threshold voltage distribution representing threshold voltages of a second group of the memory cells, wherein the second threshold voltage distribution is different from the first threshold voltage distribution, and the first group of the memory cells comprises at least a part of the second group of the memory cells; and controlling the flash memory to perform at least one read operation upon the first group of the memory cells according to the second threshold voltage distribution.
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公开(公告)号：US10599516B2
公开(公告)日：2020-03-24
申请号：US15927069
申请日：2018-03-20
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang
Abstract: An exemplary method for reading data stored in a flash memory includes: selecting an initial gate voltage combination from a plurality of predetermined gate voltage combination options; controlling a plurality of memory units in the flash memory according to the initial gate voltage combination, and reading a plurality of bit sequences; performing a codeword error correction upon the plurality of bit sequences, and determining if the codeword error correction successful; if the codeword error correction is not successful, determining an electric charge distribution parameter; determining a target gate voltage combination corresponding to the electric charge distribution parameter by using a look-up table; and controlling the plurality of memory units to read a plurality of updated bit sequences according to the target gate voltage combination.
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公开(公告)号：US20200081641A1
公开(公告)日：2020-03-12
申请号：US16686200
申请日：2019-11-17
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang , Chun-Chieh Kuo , Ching-Hui Lin , Yang-Chih Shen
Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.
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