LENGTH-SELECTIVE DIELECTROPHORETIC MANIPULATION OF SINGLE-WALLED CARBON NANOTUBES

    公开(公告)号:US20250033971A1

    公开(公告)日:2025-01-30

    申请号:US18913675

    申请日:2024-10-11

    Abstract: Systems & methods for sorting single-walled carbon nanotubes (SWNTs) using an iDEP-based sorting device. The device includes an inlet channel with a constriction and the inlet channel splits into multiple different channels after the constriction—the multiple channels includes a center channel and at least one side channel. A sample is introduced into the iDEP sorting device containing a plurality of SWNTs of different lengths suspended in a fluid. An electrical field is applied to the sample between a first electrode in the center channel and a second electrodes at a proximal end of the inlet channel. The applied electrical field causes longer SWNTs to move towards the side channels while the shorter SWNTs move towards the center channel. Accordingly, a first plurality of shorter SWNTs is then collected from the center channel and a second plurality of longer SWNTs is collected from the at least one side channel.

    FAST TRACKING PLL WITH ANALOG MIXER FOR PHASE DETECTION

    公开(公告)号:US20250023571A1

    公开(公告)日:2025-01-16

    申请号:US18714338

    申请日:2022-11-30

    Abstract: A fast-tracking phase-locked-loop (PLL) with an analog mixer for phase detection and correction is provided. A frequency lock loop architecture as described herein is used for a PLL that can lock the phase of a local oscillator to an input reference signal of arbitrarily high frequency, even if the local oscillator and the input reference signal frequencies are originally very far apart. To accommodate arbitrarily high frequency input reference signals, embodiments use an analog mixer for the phase detector, rather than a phase-frequency detector (PFD). The analog mixer can be designed to operate on input signals with frequencies of 10's of GHz, whereas the PFD is limited to input frequencies of less than 1 GHz. Embodiments use a new architecture utilizing the concept of Hartley Image Rejection receiver architecture in a frequency lock loop, which enables the PLL to adjust the local oscillator frequency to be brought within the frequency locking range of the analog mixer.

    AUTHENTICATION OF IDENTIFIERS BY LIGHT SCATTERING

    公开(公告)号:US20250005308A1

    公开(公告)日:2025-01-02

    申请号:US18701030

    申请日:2022-10-18

    Abstract: Identifying a test pattern includes positioning a test pattern that includes a first multiplicity of particles that reflect or emit light in the field of view of a first imaging device; illuminating the test pattern with light from a first light source; obtaining, with the first imaging device, a first test image of light reflected by the first multiplicity of particles; and comparing the first test image with a first reference image of a reference pattern obtained by a second imaging device.

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