公开(公告)号：US20190182585A1

公开(公告)日：2019-06-13

申请号：US16184716

申请日：2018-11-08

Applicant: Avnera Corporation

Inventor： Patrick A. Quinn ,  Robert C. Proebstel ,  Manpreet S. Khaira ,  Thomas Irrgang ,  Nigel D. Waites ,  Ian J. Myles

IPC: H04R1/32 ,  H04R1/28 ,  H04R3/00

Abstract: An acoustic layer is added to a laptop-type personal computing device, comprising: enclosing walls, optionally one or more microphones, a signal processing device, at least one audio transducer, and an acoustic waveguide. The acoustic layer adjoins one or more internal areas of a laptop-type device. The signal processing device receives an internal signal from a laptop-type device. The signal processing device provides a directive sound enhancement of the audio input signals based on room acoustics, such as reverberation, echo, noise, delay, frequency response, and/or speaker-positional information that is determined by the signal processing device. The audio transducer device generates an audible audio output in response to an audio signal output from the signal processing device. The acoustic waveguide receives the audible audio output and generates an enhanced bass audio output from the acoustic waveguide.

公开(公告)号：US20190173484A1

公开(公告)日：2019-06-06

申请号：US16174118

申请日：2018-10-29

Applicant: Avnera Corporation

Inventor： Wai Lee ,  Jianping Wen ,  Garry N. Link

IPC: H03M1/46 ,  H03M1/44 ,  H03M1/08 ,  H03M1/06

Abstract: The disclosure includes a mechanism for mitigating charge related disturbances in a Successive Approximation Register (SAR) Analog to Digital Converter (ADC) by providing a fine reference connection and a rough reference connection. A switch array is activated to couple a current bit capacitor of a capacitor array to the rough reference connection while a current bit corresponding to the current bit capacitor is determined by a comparator. The switch array is further activated to couple a previous bit capacitor of the capacitor array to the fine reference connection while the current bit capacitor is coupled to the rough reference connection. This separates charge flow on the rough reference connection from capacitors coupled to the fine reference connection.

公开(公告)号：US10230352B2

公开(公告)日：2019-03-12

申请号：US15786500

申请日：2017-10-17

Applicant: Avnera Corporation

Inventor： Xudong Zhao

IPC: G10L21/00 ,  G10L19/00 ,  H03M13/33 ,  H03M13/00 ,  H03M13/27 ,  H03H17/06 ,  G10L21/0316 ,  H03M7/00 ,  H03M5/00 ,  G10L21/0356 ,  H03H17/02 ,  G10L19/24

Abstract: Embodiments of the invention may be used to implement a rate converter that includes: 6 channels in forward (audio) path, each channel having a 24-bit signal path per channel, an End-to-end SNR of 110 dB, all within the 20 Hz to 20 KHz bandwidth. Embodiment may also be used to implement a rate converter having: 2 channels in a reverse path, such as for voice signals, 16-bit signal path per channel, an End-to-end SNR of 93 dB, all within 20 Hz to 20 KHz bandwidth. The rate converter may include sample rates such as 8, 11.025, 12, 16, 22.05, 24, 32 44.1, 48, and 96 KHz. Further, rate converters according to embodiments may include a gated clock in low-power mode to conserve power.

公开(公告)号：US10230343B2

公开(公告)日：2019-03-12

申请号：US15858101

申请日：2017-12-29

Applicant: Avnera Corporation

Inventor： Garry N. Link ,  Eric King ,  Xudong Zhao ,  Wai Lee ,  Alexander C. Stange ,  Amit Kumar

IPC: H03G3/00 ,  H03G3/32 ,  H03F1/02 ,  H03F1/30 ,  H03F3/187

Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.

公开(公告)号：US10224952B2

公开(公告)日：2019-03-05

申请号：US15490759

申请日：2017-04-18

Applicant: Avnera Corporation

Inventor： Jianping Wen ,  Ali Hadiashar ,  Eric King ,  David Entrikin ,  Wai Lang Lee

IPC: H03M3/00

Abstract: Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.

公开(公告)号：US20190019491A1

公开(公告)日：2019-01-17

申请号：US16101192

申请日：2018-08-10

Applicant: Avnera Corporation

Inventor： Amit Kumar ,  Thomas Irrgang ,  Shankar Rathoud ,  Eric Sorensen

IPC: G10K11/178 ,  H04R29/00 ,  H04R1/10

CPC classification number: G10K11/178 ,  G10K11/17813 ,  G10K11/17881 ,  G10K2210/1081 ,  G10K2210/3025 ,  G10K2210/3026 ,  G10K2210/3027 ,  G10K2210/3045 ,  G10K2210/3055 ,  G10K2210/3056 ,  G10K2210/3214 ,  G10K2210/504 ,  H04R1/1083 ,  H04R29/00 ,  H04R2460/01

Abstract: A fixture for calibrating an active noise canceling (ANC) earphone, the calibration fixture including an ear model and an acoustic path. The ear model is configured to support an ANC earphone and includes an ear canal extending from an outer end of the ear canal to an inner end of the ear canal. The acoustic path is external to the ear canal and extends from, at a first end of the acoustic path, the inner end of the ear canal of the ear model to an opposite, second end of the acoustic path. The acoustic path is configured to transmit a mechanical sound wave received from the inner end of the ear canal to a region external to the ear model and adjacent the outer end of the ear canal.

公开(公告)号：US10158373B2

公开(公告)日：2018-12-18

申请号：US15849234

申请日：2017-12-20

Applicant: Avnera Corporation

Inventor： Wai Lee ,  Jianping Wen ,  Garry N. Link

IPC: H03M1/12 ,  H03M1/46 ,  H03M1/08 ,  H03M1/44 ,  H03M1/06

Abstract: The disclosure includes a mechanism for mitigating charge related disturbances in a Successive Approximation Register (SAR) Analog to Digital Converter (ADC) by providing a fine reference connection and a rough reference connection. A switch array is activated to couple a current bit capacitor of a capacitor array to the rough reference connection while a current bit corresponding to the current bit capacitor is determined by a comparator. The switch array is further activated to couple a previous bit capacitor of the capacitor array to the fine reference connection while the current bit capacitor is coupled to the rough reference connection. This separates charge flow on the rough reference connection from capacitors coupled to the fine reference connection.

公开(公告)号：US10142734B2

公开(公告)日：2018-11-27

申请号：US16006760

申请日：2018-06-12

Applicant: Avnera Corporation

Inventor： Theodore Hetke ,  John Speth

IPC: H04R3/12 ,  H04W4/80

Abstract: A method for re-forming a complete ring network of a plurality of Bluetooth® speakers, after a speaker has left an original ring of speakers, the method including detecting that the speaker has left the ring, and reestablishing the ring without the departed speaker. The detection may include a timeout detection if the speaker left without notice, or include receiving notice that the speaker intends to leave.

公开(公告)号：US10135406B2

公开(公告)日：2018-11-20

申请号：US15385717

申请日：2016-12-20

Applicant: Avnera Corporation

Inventor： Ali Hadiashar ,  Wai Laing Lee

IPC: H03G3/20 ,  H03F3/183 ,  H03F3/45

Abstract: A new compensation system for an audio input reduces noise by matching feedback ratios in the positive and negative paths. A variable resistance network allows for fine control of resistance trimming in one of the signal paths, which allows for compensation between tolerance of resistors that are external to an integrated circuit and those that are internal to the integrated circuit.

公开(公告)号：US20180270564A1

公开(公告)日：2018-09-20

申请号：US15984068

申请日：2018-05-18

Applicant: Avnera Corporation

Inventor： Amit Kumar ,  Shankar Rathoud ,  Mike Wurtz ,  Eric Etheridge ,  Eric Sorensen

IPC: H04R1/10 ,  H04R3/00 ,  H04R29/00 ,  G10K11/178

CPC classification number: H04R1/1041 ,  G10K11/178 ,  G10K2210/1081 ,  G10K2210/3026 ,  G10K2210/3027 ,  H04R1/1008 ,  H04R3/00 ,  H04R29/001 ,  H04R2460/01

Abstract: Disclosed is a signal processor for headphone off-ear detection. The signal processor includes an audio output to transmit an audio signal toward a headphone speaker in a headphone cup. The signal processor also includes a feedback (FB) microphone input to receive a FB signal from a FB microphone in the headphone cup. The signal processor also includes an off-ear detection (OED) signal processor to determine an audio frequency response of the FB signal over an OED frame as a received frequency response. The OED processor also determines an audio frequency response of the audio signal times an off-ear transfer function between the headphone speaker and the FB microphone as an ideal off-ear response. A difference metric si generated comparing the received frequency response to the ideal off-ear frequency response. The difference metric is employed to detect when the headphone cup is disengaged from an ear.