Error signal handling unit, device and method for outputting an error condition signal
    11.
    发明授权
    Error signal handling unit, device and method for outputting an error condition signal 有权
    误差信号处理单元,用于输出错误状态信号的装置和方法

    公开(公告)号:US08786424B2

    公开(公告)日:2014-07-22

    申请号:US13397035

    申请日:2012-02-15

    CPC classification number: B60W50/0225 B60W50/0205 B60W2050/0006

    Abstract: An Error signal handling comprises a circuitry configured to receive an error signal from an external device indicating an error condition in the external device. The circuitry is further configured to receive a recovery signal indicating a mitigation of the error condition in the external device or indicating that a mitigation of the error condition in the external device is possible. Furthermore, the circuitry is further configured to output an error condition signal based on the error signal in response to a reception of the error signal if within a given delay time from the reception of the error signal, the circuitry does not receive the recovery signal and otherwise to omit outputting the error condition signal.

    Abstract translation: 错误信号处理包括被配置为从外部设备接收指示外部设备中的错误状况的错误信号的电路。 电路还被配置为接收指示在外部设备中减轻错误状况的恢复信号,或指示可以减轻外部设备中的错误状况。 此外,电路还被配置为响应于误差信号的接收而输出基于误差信号的误差条件信号,如果在从接收到误差信号的给定延迟时间内,电路没有接收到恢复信号, 否则省略输出错误状态信号。

    Method for a DMA-compatible peripheral
    12.
    发明授权
    Method for a DMA-compatible peripheral 有权
    DMA兼容外设的方法

    公开(公告)号:US08386662B2

    公开(公告)日:2013-02-26

    申请号:US12817924

    申请日:2010-06-17

    Applicant: Andre Roger

    Inventor: Andre Roger

    CPC classification number: G06F13/28 G06F13/385

    Abstract: The invention relates to a method for organizing the registers of a peripheral in memory, the peripheral including at least one control register to be addressed in memory to store configuration data of the peripheral, one transmission register to be addressed in memory to store data to be transmitted from the memory to the peripheral, and one reception register to be addressed in memory to store data to be transmitted from the peripheral to the memory, the method including: duplicating, within a data memory range, the transmission/reception register to different contiguous addresses; and implementing in memory the control registers at contiguous addresses at the level of a memory range adjacent to the memory range where the transmission/reception register has been duplicated.

    Abstract translation: 本发明涉及一种用于组织存储器中外围设备的寄存器的方法,所述外围设备包括要在存储器中寻址的至少一个控制寄存器以存储外围设备的配置数据,要在存储器中寻址的一个发送寄存器以存储数据 从存储器发送到外围设备,以及一个要在存储器中寻址的接收寄存器,用于存储要从外围设备发送到存储器的数据,该方法包括:在数据存储器范围内将发送/接收寄存器复制到不同的连续 地址 并且在与发送/接收寄存器已被复制的存储器范围相邻的存储器范围内的连续地址的存储器中实现控制寄存器。

    Computerized-interactive shift trade recording system
    14.
    发明授权
    Computerized-interactive shift trade recording system 有权
    电脑互动转移记录系统

    公开(公告)号:US06957188B1

    公开(公告)日:2005-10-18

    申请号:US09234695

    申请日:1999-01-21

    CPC classification number: G06Q10/10 G06Q10/063112 G06Q10/063116 G06Q10/109

    Abstract: An article of manufacture is provided including a computer with memory including stored therein a first list of employees each having a criteria of eligibility data associated therewith and a second list of work area functions each having a criteria of eligibility data associated therewith; a computer usable code having a computer readable program code medium embodied therein for controlling the transfer of a shift change in a place of employment, the computer readable program code medium in said article of manufacture including computer-readable program code for causing the computer to ascertain an identity of an owner of a shift, computer-readable program code for causing the computer to ascertain an identity of a recipient of a shift, and computer-readable program code for causing the computer to approve the transferring of a shift of the owner to the recipient only if the eligibility data of the recipient matches that of the work area function associated with the shift of the owner.

    Abstract translation: 提供了一种制造物品,包括具有存储器的计算机,其中存储有第一雇员列表,每个具有与之相关联的资格数据的标准,以及每个具有与之相关联的资格数据标准的工作区域功能的第二列表; 一种计算机可用代码,其具有体现在其中的计算机可读程序代码介质,用于控制就业地点的班次变更的传送,所述制品中的计算机可读程序代码介质包括用于使计算机确定的计算机可读程序代码 用于使计算机确定移位的接收者的身份的移位所有者的身份,以及用于使计算机批准所有者的转移的转移的计算机可读程序代码 收件人只有收件人的资格数据与业主转移相关的工作区域功能的资格数据相符。

    Method and System for Fault Containment
    15.
    发明申请
    Method and System for Fault Containment 有权
    故障控制方法与系统

    公开(公告)号:US20130238945A1

    公开(公告)日:2013-09-12

    申请号:US13417382

    申请日:2012-03-12

    CPC classification number: G06F11/0763 G06F11/1641 G06F11/1654 G06F11/1695

    Abstract: Embodiments relate to systems and methods for error containment in a system comprising detecting an error by processing an input signal by multiple processing units, and delaying at least one output signal of a processing unit to enable, in case an error has been detected, modifying at least one output signal of the processing unit that would cause propagation of the error through the system.

    Abstract translation: 实施例涉及用于系统中的错误容纳的系统和方法,包括通过多个处理单元处理输入信号来检测错误,以及延迟处理单元的至少一个输出信号,以在检测到错误的情况下使得在 处理单元的至少一个输出信号将导致错误传播通过系统。

    RAM MEMORY DEVICE SELECTIVELY PROTECTABLE WITH ECC
    16.
    发明申请
    RAM MEMORY DEVICE SELECTIVELY PROTECTABLE WITH ECC 有权
    RAM内存设备选择性地可以保证ECC

    公开(公告)号:US20120030540A1

    公开(公告)日:2012-02-02

    申请号:US13192241

    申请日:2011-07-27

    Abstract: An SRAM memory device including a plurality of memory cells arranged in a plurality of rows and a plurality of columns; each row of memory cells is adapted to store a RAM word; the RAM word includes a corresponding data word, a corresponding ECC word to be used for error detection and correction purposes and a corresponding applicative word to be used during debugging operations. The SRAM memory device further includes a configurable port adapted to receive a RAM word and to program corresponding memory cells of a selected row based on the received RAM word during a writing access of the SRAM memory device. The SRAM memory device further includes a memory controller unit including circuitry for selectively configuring the configurable port in one among a plurality of modes. The plurality of modes includes a first mode, wherein the configurable port is configured in such a way to disable the programming of the data word and of the corresponding ECC word of the received RAM word and at the same time enable the programming of the applicative word of the received RAM word during the writing access. The plurality of modes includes a second mode, wherein the configurable port is configured in such a way to disable the programming of the applicative word of the received RAM word and at the same time enable the programming of the data word and of the corresponding ECC word of the received RAM word during the writing access.

    Abstract translation: 一种SRAM存储器件,包括以多行和多列布置的多个存储单元; 每行存储单元适于存储RAM字; RAM字包括相应的数据字,用于错误检测和校正目的的相应ECC字以及在调试操作期间使用的对应字。 SRAM存储器件还包括可配置端口,其适于在SRAM存储器件的写入访问期间基于所接收的RAM字来接收RAM字并编程所选行的相应存储器单元。 SRAM存储器装置还包括存储器控制器单元,其包括用于在多个模式之一中选择性地配置可配置端口的电路。 多个模式包括第一模式,其中可配置端口被配置为禁止数据字和所接收的RAM字的相应ECC字的编程,并且同时使得应用字的编程 在写入访问期间接收到的RAM字。 多个模式包括第二模式,其中可配置端口被配置为禁止所接收的RAM字的应用字的编程,并且同时使得能够对数据字和对应的ECC字进行编程 在写入访问期间接收到的RAM字。

    FUEL CHANNEL ANNULUS SPACER
    17.
    发明申请
    FUEL CHANNEL ANNULUS SPACER 审中-公开
    燃油通道ANNULUS SPACER

    公开(公告)号:US20110311015A1

    公开(公告)日:2011-12-22

    申请号:US13046391

    申请日:2011-03-11

    Abstract: An annulus spacer for a fuel channel assembly of a nuclear reactor. The fuel channel assembly includes a calandria tube and a pressure tube positioned at least partially within the calandria tube. The annulus spacer includes a garter spring configured to surround a portion of the pressure tube to maintain a gap between the calandria tube and the pressure tube. The garter spring includes a first end and a second end. The annulus spacer also includes a connector coupled to the first end and the second end of the garter spring. The connector allows movement of the annulus spacer when the pressure tube moves relative to the calandria tube during thermal cycles of the fuel channel assembly. The annulus spacer further includes a girdle wire positioned substantially within the garter spring and configured to form a loop around the pressure tube.

    Abstract translation: 用于核反应堆的燃料通道组件的环形间隔件。 燃料通道组件包括至少部分地位于加热器管内的压汞管和压力管。 环形间隔件包括一个构造成围绕压力管的一部分以保持卡氏管与压力管之间的间隙的卡箍弹簧。 绞合弹簧包括第一端和第二端。 环形间隔物还包括连接到该连接器弹簧的第一端和第二端的连接器。 当燃料通道组件的热循环期间压力管相对于加热管移动时,连接器允许环形间隔件的移动。 所述环形间隔件还包括基本上位于所述张紧弹簧内并且被构造成围绕所述压力管形成环的腰带。

    P.A. system installation method
    18.
    发明授权
    P.A. system installation method 有权
    P.A. 系统安装方式

    公开(公告)号:US07171005B2

    公开(公告)日:2007-01-30

    申请号:US10517431

    申请日:2003-06-06

    CPC classification number: H04R27/00 H04R3/04

    Abstract: The invention concerns a method for transmitting in an area (100) information items in the form of sound waves representing a signal X(t), through a loudspeaker enclosure (2), said method comprising a step of setting up a public address system which consists in applying to the input of the loudspeaker enclosure (2) an electric signal P(t)=W(t) ?X(t) wherein is the convolution product and W(t)=S(−t)? I(t), wherein S(−t) is the temporal return of the pulse response S(t) between the enclosure and the target zone (101) belonging to the area to be fitted with a P.A. system (100) t representing time, and I(t) is the temporal response of the product e−2inft0.Sc (f), wherein f represents the frequency, t0 is a constant Sc(f)=1/(S1(f))α, α being a non-null positive number and S1(f) being a real function obtained by peak clipping of the modulo I S(f) I of the frequency response S(f) of S(t).

    Abstract translation: 本发明涉及通过扬声器外壳(2)在区域(100)中以表示信号X(t)的声波形式的信息项发送的方法,所述方法包括建立公共广播系统的步骤 包括向扬声器机箱(2)的输入端施加电信号P(t)= W(t)→X(t),其中是卷积乘积,W(t)= S(-t) I(t)其中S(-t)是外壳与属于要安装P.A.的区域的目标区域(101)之间的脉冲响应S(t)的时间返回。 系统(100)t表示时间,I(t)是乘积e时间响应。(f),其中f表示频率,t 0是常数Sc(f )= 1 /(S 1(f))αα,α是非零正数,S 1(f)是通过模IS(f)I的峰限制获得的实函数 的S(t)的频率响应S(f)。

    Layered capacitor device
    20.
    发明授权
    Layered capacitor device 有权
    分层电容器

    公开(公告)号:US06178083B1

    公开(公告)日:2001-01-23

    申请号:US09544477

    申请日:2000-04-07

    Abstract: A layered capacitor device with high capacitance per unit area is realized by alternating in the vertical direction first layers (FL1, FL2, FL3, FL4, FL5) and second layers (SL1, SL2, SL3, SL4). A first layer (FL2) consists of horizontally alternating electrically conducting tracks (T2,2; T2,3) and electrically insulating tracks, whereas a second layer includes of electrically insulating material, e.g. an oxide. In this way top-bottom capacitors (CTB) and side-wall capacitors (CSW) are constituted that are parallel coupled to form the layered capacitor device. In a preferred embodiment of the invention, this parallel coupling is realized by conductively interconnecting diagonally neighboring electrically conducting tracks (T1,2; T2,3).

    Abstract translation: 通过在垂直方向上的第一层(FL1,FL2,FL3,FL4,FL5)和第二层(SL1,SL2,SL3,SL4)交替地实现每单位面积具有高电容的分层电容器装置。 第一层(FL2)由水平交替的导电轨道(T2,2; T2,3)和电绝缘轨道组成,而第二层包括电绝缘材料,例如电绝缘材料。 氧化物。 以这种方式构成并联耦合以形成分层电容器装置的顶部底部电容器(CTB)和侧壁电容器(CSW)。 在本发明的优选实施例中,通过将对角相邻的导电轨道(T1,2; T2,3)导电互连来实现该并联耦合。

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