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    Halftone mask and manufacturing method thereof and method for forming film using the same
    13.
    发明授权
    Halftone mask and manufacturing method thereof and method for forming film using the same 有权
    半色调掩模及其制造方法和使用其形成膜的方法

    公开(公告)号：US08367278B2

    公开(公告)日：2013-02-05

    申请号：US12824086

    申请日：2010-06-25

    Applicant: Oh-Seob Kwon ,  Jae-Yong Kim ,  Sung-Chul Kim ,  Kyoung-Bo Kim ,  Il-Jeong Lee ,  Cheol-Ho Yu ,  Yong-Woo Park ,  Han-Hee Yoon ,  In-Young Jung

    Inventor： Oh-Seob Kwon ,  Jae-Yong Kim ,  Sung-Chul Kim ,  Kyoung-Bo Kim ,  Il-Jeong Lee ,  Cheol-Ho Yu ,  Yong-Woo Park ,  Han-Hee Yoon ,  In-Young Jung

    IPC: G03F1/32

    CPC classification number: G03F1/50

    Abstract: Embodiments relate to halftone masks that can uniformly form the height of an underlying layer in two regions that are spaced apart from each other, a manufacturing method thereof, and a method for forming a film using the same. The halftone mask includes a first light blocking unit and a second light blocking unit, and a semi-transmitting unit that is disposed adjacent to the side of the second light blocking unit. The first and second light blocking units block light and are spaced apart from each other at a predetermined interval. The semi-transmitting unit is positioned at a side far from the first light blocking unit and reduces intensity of light. Sum of the second length of the second light blocking unit and the third length of the semi-transmitting unit is larger than the first length of the first blocking unit.

    Abstract translation: 实施例涉及可以在彼此间隔开的两个区域中均匀地形成下层的高度的半色调掩模，其制造方法和使用其形成膜的方法。 半色调掩模包括第一遮光单元和第二遮光单元，以及邻近第二遮光单元的一侧设置的半透射单元。 第一和第二光阻挡单元阻挡光并以预定间隔彼此间隔开。 半透射单元位于远离第一遮光单元的一侧，并且减小光的强度。 第二遮光单元的第二长度和半透射单元的第三长度之和大于第一遮光单元的第一长度。

    HALFTONE MASK AND MANUFACTURING METHOD THEREOF AND METHOD FOR FORMING FILM USING THE SAME
    15.
    发明申请
    HALFTONE MASK AND MANUFACTURING METHOD THEREOF AND METHOD FOR FORMING FILM USING THE SAME 有权
    黑龙骨掩模及其制造方法及使用其形成膜的方法

    公开(公告)号：US20100330468A1

    公开(公告)日：2010-12-30

    申请号：US12824086

    申请日：2010-06-25

    Applicant: Oh-Seob Kwon ,  Jae-Yong Kim ,  Sung-Chul Kim ,  Kyoung-Bo Kim ,  Il-Jeong Lee ,  Cheol-Ho Yu ,  Yong-Woo Park ,  Han-Hee Yoon ,  In-Young Jung

    Inventor： Oh-Seob Kwon ,  Jae-Yong Kim ,  Sung-Chul Kim ,  Kyoung-Bo Kim ,  Il-Jeong Lee ,  Cheol-Ho Yu ,  Yong-Woo Park ,  Han-Hee Yoon ,  In-Young Jung

    IPC: G03F7/20 ,  G03F1/00

    CPC classification number: G03F1/50

    Abstract: Embodiments relate to halftone masks that can uniformly form the height of an underlying layer in two regions that are spaced apart from each other, a manufacturing method thereof, and a method for forming a film using the same. The halftone mask includes a first light blocking unit and a second light blocking unit, and a semi-transmitting unit that is disposed adjacent to the side of the second light blocking unit. The first and second light blocking units block light and are spaced apart from each other at a predetermined interval. The semi-transmitting unit is positioned at a side far from the first light blocking unit and reduces intensity of light. Sum of the second length of the second light blocking unit and the third length of the semi-transmitting unit is larger than the first length of the first blocking unit.

    Abstract translation: 实施例涉及可以在彼此间隔开的两个区域中均匀地形成下层的高度的半色调掩模，其制造方法和使用其形成膜的方法。 半色调掩模包括第一遮光单元和第二遮光单元，以及邻近第二遮光单元的一侧设置的半透射单元。 第一和第二光阻挡单元阻挡光并以预定间隔彼此间隔开。 半透射单元位于远离第一遮光单元的一侧，并且减小光的强度。 第二遮光单元的第二长度和半透射单元的第三长度之和大于第一遮光单元的第一长度。

    Thin film transistor, method of fabricating the same, and organic light emitting diode display device including the same
    16.
    发明申请
    Thin film transistor, method of fabricating the same, and organic light emitting diode display device including the same 有权
    薄膜晶体管，其制造方法以及包括该薄膜晶体管的有机发光二极管显示装置

    公开(公告)号：US20100001287A1

    公开(公告)日：2010-01-07

    申请号：US12458126

    申请日：2009-07-01

    Applicant: Ji-Su Ahn ,  Eui-Hoon Hwang ,  Cheol-Ho Yu ,  Kwang-Nam Kim ,  Sung-Chul Kim

    Inventor： Ji-Su Ahn ,  Eui-Hoon Hwang ,  Cheol-Ho Yu ,  Kwang-Nam Kim ,  Sung-Chul Kim

    IPC: H01L29/786 ,  H01L21/336 ,  H01L33/00

    CPC classification number: H01L29/78675 ,  H01L27/1248 ,  H01L27/1285 ,  H01L27/3262 ,  H01L29/66757

    Abstract: A thin film transistor (TFT), including a crystalline semiconductor pattern on a substrate, a gate insulating layer on the crystalline semiconductor pattern, the gate insulating layer having two first source/drain contact holes and a semiconductor pattern access hole therein, a gate electrode on the gate insulating layer, the gate electrode being between the two first source/drain contact holes, an interlayer insulating layer covering the gate electrode, the interlayer insulating layer having two second source/drain contact holes therein, and source and drain electrodes on the interlayer insulating layer, each of the source and drain electrodes being insulated from the gate electrode, and having a portion connected to the crystalline semiconductor pattern through the first and second source/drain contact holes.

    Abstract translation: 一种薄膜晶体管（TFT），包括在基板上的晶体半导体图形，在晶体半导体图案上的栅极绝缘层，栅极绝缘层具有两个第一源极/漏极接触孔和半导体图案访问孔，栅电极 在栅极绝缘层上，栅电极位于两个第一源极/漏极接触孔之间，覆盖栅电极的层间绝缘层，其中具有两个第二源极/漏极接触孔的层间绝缘层，以及栅电极上的源极和漏极 层间绝缘层，源极和漏极中的每一个与栅电极绝缘，并且具有通过第一和第二源极/漏极接触孔连接到晶体半导体图案的部分。

    Method for fabricating thin film transistor
    17.
    发明授权
    Method for fabricating thin film transistor 有权
    制造薄膜晶体管的方法

    公开(公告)号：US07615421B2

    公开(公告)日：2009-11-10

    申请号：US11011585

    申请日：2004-12-15

    Applicant: Sang-Woong Lee ,  Jae-Young Oh ,  Tae-Hoon Yang ,  Jin-Wook Seo ,  Ki-Yong Lee ,  Cheol-Ho Yu

    Inventor： Sang-Woong Lee ,  Jae-Young Oh ,  Tae-Hoon Yang ,  Jin-Wook Seo ,  Ki-Yong Lee ,  Cheol-Ho Yu

    IPC: H01L21/84

    CPC classification number: H01L21/02672 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/2022 ,  H01L27/1277 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/78675

    Abstract: The present invention relates to a method for fabricating thin film transistor, more particularly, to a method for fabricating thin film transistor which not only manufactures a polycrystalline silicon layer having large grain size and containing a trace of residual metal catalyst by heat treating thereby crystallizing the metal catalyst layer after forming an amorphous silicon layer on a substrate, forming a capping layer formed of nitride film having 1.78 to 1.90 of the refraction index when crystallizing the amorphous silicon layer and forming a metal catalyst layer on the capping layer, but also controls characteristics of the polycrystalline silicon layer by controlling the refraction index of the capping layer.

    Abstract translation: 本发明涉及一种制造薄膜晶体管的方法，更具体地说，涉及制造薄膜晶体管的方法，该方法不仅通过热处理制造具有大晶粒尺寸并且含有微量残余金属催化剂的多晶硅层，从而使 在基板上形成非晶硅层之后，形成由氮化物膜形成的覆盖层，所述覆盖层在结晶非晶硅层时具有1.78〜1.90的折射率，并且在封盖层上形成金属催化剂层，而且还控制特性 的多晶硅层，通过控制覆盖层的折射率。

    Method for fabricating thin film transistor
    18.
    发明申请
    Method for fabricating thin film transistor 有权
    制造薄膜晶体管的方法

    公开(公告)号：US20060046357A1

    公开(公告)日：2006-03-02

    申请号：US11011585

    申请日：2004-12-15

    Applicant: Sang-Woong Lee ,  Jae-Young Oh ,  Tae-Hoon Yang ,  Jin-Wook Seo ,  Ki-Yong Lee ,  Cheol-Ho Yu

    Inventor： Sang-Woong Lee ,  Jae-Young Oh ,  Tae-Hoon Yang ,  Jin-Wook Seo ,  Ki-Yong Lee ,  Cheol-Ho Yu

    IPC: H01L21/84 ,  H01L21/00

    CPC classification number: H01L21/02672 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/2022 ,  H01L27/1277 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/78675

    Abstract: The present invention relates to a method for fabricating thin film transistor, more particularly, to a method for fabricating thin film transistor which not only manufactures a polycrystalline silicon layer having large grain size and containing a trace of residual metal catalyst by heat treating thereby crystallizing the metal catalyst layer after forming an amorphous silicon layer on a substrate, forming a capping layer formed of nitride film having 1.78 to 1.90 of the refraction index when crystallizing the amorphous silicon layer and forming a metal catalyst layer on the capping layer, but also controls characteristics of the polycrystalline silicon layer by controlling the refraction index of the capping layer. The present invention provides a method for fabricating thin film transistor comprising the steps of preparing an insulation substrate; forming an amorphous silicon layer on the substrate; forming a capping layer having 1.78 to 1.90 of the refraction index on the amorphous silicon layer; forming a metal catalyst layer on the capping layer; and crystallizing the amorphous silicon layer into a polycrystalline silicon layer by heat treating the substrate. Therefore, a method for fabricating thin film transistor fabricates a thin film transistor which has superior characteristics and is capable of controlling the characteristics by controlling the refraction index of capping layer formed of nitride film to 1.78 to 1.90 when performing crystallization by super grain silicon crystallization method, thereby obtaining a semiconductor layer having a large grain size so that electron mobility is increased, and an amount of metal catalyst remained is decreased to lower leakage current, and controlling grain size of polycrystalline silicon layer by the refraction index of the capping layer so that a polycrystalline silicon layer having desired size and uniformity is obtained.

    Abstract translation: 本发明涉及一种制造薄膜晶体管的方法，更具体地说，涉及制造薄膜晶体管的方法，该方法不仅通过热处理制造具有大晶粒尺寸并且含有微量残余金属催化剂的多晶硅层，从而使 在基板上形成非晶硅层之后，形成由氮化物膜形成的覆盖层，所述覆盖层在结晶非晶硅层时具有1.78〜1.90的折射率，并且在封盖层上形成金属催化剂层，而且还控制特性 的多晶硅层，通过控制覆盖层的折射率。 本发明提供一种制造薄膜晶体管的方法，包括以下步骤：制备绝缘衬底; 在所述基板上形成非晶硅层; 形成在非晶硅层上具有1.78至1.90折射率的覆盖层; 在覆盖层上形成金属催化剂层; 以及通过对所述衬底进行热处理将所述非晶硅层结晶成多晶硅层。 因此，制造薄膜晶体管的方法制造薄膜晶体管，其具有优异的特性，并且能够通过将由氮化物膜形成的覆盖层的折射率控制在通过超晶硅结晶法进行结晶时为1.78〜1.90的特性 从而获得具有大晶粒尺寸的电子迁移率增加的半导体层，并且减少金属催化剂的剩余量以降低泄漏电流，并且通过覆盖层的折射率控制多晶硅层的晶粒尺寸，使得 得到所需尺寸和均匀性的多晶硅层。

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