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公开(公告)号:US20190189443A1
公开(公告)日:2019-06-20
申请号:US15846779
申请日:2017-12-19
发明人: Peng Xu , Kangguo Cheng , Choonghyun Lee , Juntao Li
IPC分类号: H01L21/033 , H01L21/02
CPC分类号: H01L21/0332 , H01L21/02164 , H01L21/02255 , H01L21/02296 , H01L21/02381 , H01L21/02532 , H01L21/02592 , H01L21/02664 , H01L21/02694 , H01L21/0337 , H01L21/0338 , H01L21/3081 , H01L21/3086 , H01L21/3088 , H01L21/31144 , H01L27/1285 , H01L29/6653 , H01L29/6656 , H01L45/1691
摘要: A method for manufacturing a semiconductor device includes forming a plurality of amorphous silicon germanium (a-SiGe) structures having a first percentage of germanium on a substrate, forming a plurality of spacers on sides of the plurality of a-SiGe structures, performing an annealing to convert a portion of each of the a-SiGe structures into respective portions comprising a-SiGe having a second percentage of germanium higher than the first percentage of germanium, and to convert each of the spacers into respective silicon oxide portions, removing from the substrate at least one of: one or more unconverted portions of the a-SiGe structures having the first percentage of germanium, one or more of the converted portions of a-SiGe structures, and one or more of the silicon oxide portions, and transferring a pattern to the substrate to form a plurality of patterned substrate portions, wherein the pattern includes the portions remaining after the removing.
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公开(公告)号:US20180308985A1
公开(公告)日:2018-10-25
申请号:US15998054
申请日:2018-06-21
发明人: Tomoaki Moriwaka
IPC分类号: H01L29/786 , H01L29/45 , H01L29/417 , H01L29/04 , H01L27/12 , H01L21/02 , H01L21/285
CPC分类号: H01L29/78618 , H01L21/02532 , H01L21/02592 , H01L21/02609 , H01L21/02683 , H01L21/02686 , H01L21/02691 , H01L21/28518 , H01L27/1285 , H01L29/045 , H01L29/41733 , H01L29/458 , H01L29/78654
摘要: The invention relates to a method for forming a uniform silicide film using a crystalline semiconductor film in which orientation of crystal planes is controlled, and a method for manufacturing a thin film transistor with less variation in electric characteristics, which is formed over an insulating substrate using the silicide film. A semiconductor film over which a cap film is formed is irradiated with a laser to be crystallized under the predetermined condition, so that a crystalline semiconductor film including large grain crystals in which orientation of crystal planes is controlled in one direction is formed. The crystalline semiconductor film is used for silicide, whereby a uniform silicide film can be formed.
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公开(公告)号:US20180248031A1
公开(公告)日:2018-08-30
申请号:US15964026
申请日:2018-04-26
发明人: Masahiro KATO
IPC分类号: H01L29/786 , G02F1/1335 , G02F1/1362 , G02F1/1368 , G02F1/1333 , H01L27/12
CPC分类号: H01L29/786 , G02F1/133345 , G02F1/133514 , G02F1/136286 , G02F1/1368 , G02F2001/133354 , G02F2201/123 , H01L27/124 , H01L27/1285 , H01L27/1288
摘要: There is provided a manufacturing method for a thin-film transistor substrate, which enables to excellently perform alignment between an annealed region of a semiconductor film and a mask pattern of a conductive film. The method comprises annealing a semiconductor film being formed on a gate insulation film covering a gate electrode with a laser beam by using a mask, the gate electrode being formed within a thin-film transistor substrate region on a substrate; forming a first alignment mark outside the thin-film transistor substrate region on the substrate, by irradiating the substrate through the mask with the laser beam; patterning the semiconductor film; forming a conductive film on the semiconductor film; positioning a photomask on the basis of the first alignment mark; and forming a source electrode and a drain electrode by patterning the conductive film through the photomask; wherein the first alignment mark is formed while annealing the semiconductor film.
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公开(公告)号:US20180174836A1
公开(公告)日:2018-06-21
申请号:US15848086
申请日:2017-12-20
发明人: Emil Aslanov , Jekil Ryu , Haesook Lee , Gyoowan Han
IPC分类号: H01L21/02 , H01L29/786 , H01L21/268 , H01L29/66 , H01L27/12 , B23K26/06
CPC分类号: H01L21/02675 , B23K26/0608 , B23K26/0648 , B23K26/0676 , B23K2103/56 , H01J9/241 , H01J29/467 , H01L21/02532 , H01L21/02595 , H01L21/02678 , H01L21/268 , H01L27/1277 , H01L27/1285 , H01L29/6675 , H01L29/78672 , H01S5/005 , H01S5/4012
摘要: A laser polycrystallization apparatus including: a light source for emitting a laser beam; a diffraction grating for receiving the laser beam from the light source, changing a path and a magnitude of the received laser beam, and outputting the changed laser beam; a light split portion for splitting the laser beam received from the diffraction grating; and a light superposition portion for superposing the split laser beams received from the light split portion and irradiating the superposed split laser beams to a substrate. An angle between the laser beam irradiated to an incidence surface of the diffraction grating from the light source and a line substantially perpendicular to an emission surface of the diffraction grating is an acute angle.
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公开(公告)号:US20180155237A1
公开(公告)日:2018-06-07
申请号:US14897858
申请日:2015-10-08
申请人: Shenzhen China Star Optoelectronics Technology Co. Ltd. , Wuhan China Star Optoelectronics Technology Co. Ltd.
发明人: Zijian LI
CPC分类号: C03C17/225 , C03C15/00 , C03C17/23 , C03C17/30 , C03C17/3435 , C03C17/3482 , C03C2217/213 , C03C2217/281 , C03C2218/33 , C03C2218/345 , H01L21/02296 , H01L21/02422 , H01L21/02488 , H01L21/02502 , H01L21/02532 , H01L21/02675 , H01L21/02686 , H01L21/324 , H01L27/1285 , H01L31/1864
摘要: A method for manufacturing a substrate is disclosed. The method comprises the following steps: step one, depositing an amorphous silicon layer on a base material; step two, depositing a silicon dioxide layer with a first thickness on the amorphous silicon layer; and step three, etching the silicon dioxide layer until a thickness thereof is reduced to a second thickness. According to the method of the present disclosure, the silicon dioxide layer with a needed thickness can be manufactured on the amorphous silicon layer. When the ELA procedure is performed, the silicon dioxide layer has an enough thickness to prevent the formation of protrusions at grain boundary of polysilicon, so that the semi-conductive layer manufactured therein can have a relatively low roughness.
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公开(公告)号:US09991286B2
公开(公告)日:2018-06-05
申请号:US15370034
申请日:2016-12-06
发明人: Jun Koyama , Shunpei Yamazaki
IPC分类号: H01L27/12 , G02F1/1345 , H01L29/04 , H01L29/66 , H01L29/786 , G02F1/1368 , G02F1/1333 , G02F1/1343 , G02F1/1362 , G09G3/3266 , G09G3/3275 , G09G3/36
CPC分类号: H01L27/1225 , G02F1/133345 , G02F1/134309 , G02F1/13452 , G02F1/13454 , G02F1/136286 , G02F1/1368 , G02F2201/123 , G09G3/3266 , G09G3/3275 , G09G3/3677 , G09G3/3688 , G09G2300/0426 , G09G2310/0286 , G09G2310/08 , G09G2330/023 , H01L27/124 , H01L27/1285 , H01L29/045 , H01L29/66742 , H01L29/66969 , H01L29/7869
摘要: One embodiment of the present invention provides a highly reliably display device in which a high mobility is achieved in an oxide semiconductor. A first oxide component is formed over a base component. Crystal growth proceeds from a surface toward an inside of the first oxide component by a first heat treatment, so that a first oxide crystal component is formed in contact with at least part of the base component. A second oxide component is formed over the first oxide crystal component. Crystal growth is performed by a second heat treatment using the first oxide crystal component as a seed, so that a second oxide crystal component is formed. Thus, a stacked oxide material is formed. A transistor with a high mobility is formed using the stacked oxide material and a driver circuit is formed using the transistor.
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公开(公告)号:US09964854B2
公开(公告)日:2018-05-08
申请号:US15472233
申请日:2017-03-28
发明人: Jingfeng Xue , Xin Zhang , Gui Chen
IPC分类号: H01L21/67 , G03F7/20 , H01L29/786 , H01L21/223 , H01L21/265 , H01L21/266 , H01L27/12 , H01L29/66 , G02F1/1368 , H01L21/027
CPC分类号: G03F7/70058 , G02F1/1368 , G02F2202/104 , H01L21/0274 , H01L21/223 , H01L21/2652 , H01L21/266 , H01L21/67011 , H01L27/1222 , H01L27/127 , H01L27/1285 , H01L27/1288 , H01L29/66492 , H01L29/66598 , H01L29/66757 , H01L29/786 , H01L29/78621 , H01L29/78675
摘要: A device for manufacturing an array substrate includes an exposure device for using a halftone mask to form a photoresist pattern layer on a gate insulation layer of a substrate. A polysilicon pattern layer is disposed on the substrate. A gate insulation layer covers the polysilicon pattern layer. The photoresist pattern layer includes a hollow portion corresponding to a heavily doping region of the polysilicon pattern layer, a first photoresist portion corresponding to a lightly doping region of the polysilicon pattern layer, and a second photoresist portion corresponding to an undoped region of the polysilicon pattern layer. The first photoresist portion is thinner than the second photoresist portion. A doping device is used for performing one doping process to the polysilicon pattern layer such that the heavily doping region and the lightly doping region are formed simultaneously.
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公开(公告)号:US20180040648A1
公开(公告)日:2018-02-08
申请号:US15537748
申请日:2016-09-02
发明人: Xueyan Tian
IPC分类号: H01L27/12 , H01L29/786 , H01L21/02
CPC分类号: H01L27/1296 , G02F1/13454 , G02F1/1368 , G02F2202/104 , H01L21/02532 , H01L21/02592 , H01L21/02686 , H01L27/1229 , H01L27/1233 , H01L27/1281 , H01L27/1285 , H01L27/1288 , H01L27/3262 , H01L29/78675
摘要: An array substrate and manufacturing method thereof, a display panel and a display device are provided. The array substrate includes a display area and a peripheral circuit area. The method includes forming an amorphous silicon thin film on the base substrate, forming a first amorphous silicon layer in the display area and a second amorphous silicon layer in the peripheral circuit area by a patterning process, so that a thickness of the first amorphous silicon layer is less than a thickness of the second amorphous silicon layer; and processing the first amorphous silicon layer and the second amorphous silicon layer simultaneously by an excimer laser annealing to form a first poly-silicon layer in the display area and a second poly-silicon layer in the peripheral circuit area, a grain size of the first poly-silicon layer being less than a grain size of the second poly-silicon layer.
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公开(公告)号:US20170331061A1
公开(公告)日:2017-11-16
申请号:US15663226
申请日:2017-07-28
发明人: Ji-Eun Lee , Sun-Ja Kwon
IPC分类号: H01L51/05 , H01L51/10 , H01L27/108 , H01L51/52 , H01L27/12
CPC分类号: H01L51/0545 , G09G3/3233 , G09G2300/0426 , G09G2300/0814 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2300/0866 , H01L27/10882 , H01L27/1285 , H01L27/3262 , H01L27/3265 , H01L27/3276 , H01L51/107 , H01L51/5296
摘要: An organic light-emitting diode display is disclosed. In one aspect, the display includes a substrate, a scan line formed over the substrate and configured to provide a scan signal, and a data line crossing the scan line and configured to provide a data voltage. A driving voltage line crosses the scan line and is configured to provide a driving voltage. The display also includes a switching transistor electrically connected to the scan line and the data line and a driving transistor electrically connected to the switching transistor and including a driving gate electrode, a driving source electrode, and a driving drain electrode. The display further includes a storage capacitor including a first storage electrode formed over the driving transistor and the driving gate electrode as a second storage electrode. The second storage electrode overlaps the first storage electrode in the depth dimension and extends from the driving voltage line.
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公开(公告)号:US09812541B2
公开(公告)日:2017-11-07
申请号:US14422321
申请日:2014-03-25
发明人: Guangcai Yuan
IPC分类号: H01L29/78 , H01L29/423 , H01L27/12 , H01L29/24 , H01L29/51 , H01L29/786
CPC分类号: H01L29/42384 , H01L27/1225 , H01L27/1285 , H01L27/1288 , H01L29/24 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/78606 , H01L29/7869 , H01L29/78696 , H01L2029/42388
摘要: A method for fabricating an array substrate is disclosed, the array substrate includes a first TFT and a pixel electrode. The method includes: forming a buffer layer (322) on the substrate (321); depositing an active layer film (323, 324) and a transparent electrode layer (326) on the substrate (321) having the buffer layer (322) formed thereon, and forming patterns of an active layer (171), a source/drain electrode (151, 152) and a pixel electrode of the first TFT through a single patterning process. An array substrate and a display device fabricated by the above method are also disclosed. By means of the fabrication method, it significantly reduces the fabrication cycle of the TFT, improves the stability of the TFT, such that threshold voltage of the TFT will not drift severely. Meanwhile, the product yield is improved and the lifetime of the device is extended.
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