Digital-to-analog converting device and method used in home networking system with compensation mechanism to reduce clock jitter
    11.
    发明授权
    Digital-to-analog converting device and method used in home networking system with compensation mechanism to reduce clock jitter 有权
    用于家庭网络系统中的数模转换设备和方法,具有补偿机制,可减少时钟抖动

    公开(公告)号:US06549157B1

    公开(公告)日:2003-04-15

    申请号:US10020183

    申请日:2001-12-18

    IPC分类号: H03M166

    CPC分类号: H03M1/0836 H03M1/66

    摘要: A digital-to-analog converting method operating under two clock signals of different periods is disclosed. The method includes steps of monitoring a phase relationship between the two clock signals; starting transmission of a plurality of pre-stored series of waveform samples in response to each rising edge of the first clock signal, wherein a phase difference is present between every two adjacent series of waveform samples; outputting the waveform samples of each series in response to rising edges of the second clock signal; and selecting one of the plurality of pre-stored sets of waveform samples to be converted into an analog signal according to the phase relationship. The various pre-stored series of waveform samples having therebetween phase differences are optionally used for phase compensation so as to reduce the clock jitter between the two clock signals. A digital-to-analog converter for implementing the above-mentioned method is also disclosed.

    摘要翻译: 公开了在不同周期的两个时钟信号下工作的数模转换方法。 该方法包括监视两个时钟信号之间的相位关系的步骤; 响应于所述第一时钟信号的每个上升沿开始发送多个预先存储的一系列波形采样,其中在每两个相邻的一系列波形采样之间存在相位差; 响应于第二时钟信号的上升沿输出每个串联的波形样本; 以及根据所述相位关系选择所述多个预先存储的波形样本集中的一个被转换成模拟信号。 具有这些相位差的各种预先存储的波形样本系列可选地用于相位补偿,以便减少两个时钟信号之间的时钟抖动。 还公开了一种用于实现上述方法的数模转换器。

    Method for impulse noise mitigation
    12.
    发明授权
    Method for impulse noise mitigation 有权
    脉冲噪声抑制方法

    公开(公告)号:US08385399B2

    公开(公告)日:2013-02-26

    申请号:US12725592

    申请日:2010-03-17

    IPC分类号: H03H7/30

    摘要: A method of noise mitigation in a multi-carrier communication system includes receiving a signal from a decision device, determining whether synchronization symbol update is enabled, updating at least one of frequency-domain equalizer (FEQ) coefficients or digital echo canceller (DEC) coefficients in synchronization symbol periods if the synchronization symbol update is enabled, determining whether data symbol update is performed if the synchronization symbol update is not enabled, determining whether a flag associated with the signal is set if the data symbol update is not performed, and updating at least one of FEQ or DEC coefficients associated with the signal in synchronization symbol periods if the flag is set.

    摘要翻译: 一种多载波通信系统中的噪声抑制方法包括从判决装置接收信号,确定是否启用同步符号更新,更新频域均衡器(FEQ)系数或数字回声消除器(DEC)系数中的至少一个系数 如果同步符号更新被使能,则确定在不启用同步符号更新的情况下是否执行数据符号更新,如果未执行数据符号更新,则确定与该信号相关联的标志是否被设置,并且在 如果标志被设置,则与同步符号周期中的信号相关联的FEQ或DEC系数中的至少一个。

    Transmission Power Control Method
    13.
    发明申请
    Transmission Power Control Method 有权
    传输功率控制方法

    公开(公告)号:US20120258760A1

    公开(公告)日:2012-10-11

    申请号:US13316578

    申请日:2011-12-12

    IPC分类号: H04W52/04

    CPC分类号: H04M11/062 H04L25/0202

    摘要: The present invention discloses a transmission power control method for a communication system comprising a transmitter and a plurality of receivers. The transmitter is coupled to the plurality of receivers via a plurality of corresponding outgoing links. The transmission power control method comprising steps of each of the plurality of receivers performing channel estimation for each of the plurality of corresponding outgoing links, and replying a first suggested transmission power back-off level to the transmitter; and the transmitter determining a new transmission power back-off level after collecting a plurality of first suggested transmission power back-off levels from the plurality of receivers.

    摘要翻译: 本发明公开了一种包括发射机和多个接收机的通信系统的发射功率控制方法。 发射机经由多个对应的出站链路耦合到多个接收机。 所述发射功率控制方法包括以下步骤:所述多个接收机中的每一个对所述多个对应的出站链路中的每一个执行信道估计,并向所述发射机回复第一建议的发射功率回退电平; 并且所述发射机在从所述多个接收机收集多个第一建议的发射功率回退电平之后确定新的发射功率回退电平。

    Scattering-parameter estimation method and transceiver using the same
    14.
    发明授权
    Scattering-parameter estimation method and transceiver using the same 有权
    散射参数估计方法和收发器使用相同

    公开(公告)号:US08189702B1

    公开(公告)日:2012-05-29

    申请号:US13115099

    申请日:2011-05-24

    申请人: Ching-Kae Tzou

    发明人: Ching-Kae Tzou

    IPC分类号: H04K1/10 H04L27/28

    摘要: The present invention discloses a scattering-parameter estimation method for a transceiver of a half-duplex multicarrier communication system. The scattering-parameter estimation method includes steps of converting a first frequency-domain transmit signal to generate at least one symbol period of the first time-domain transmit signal; transmitting the first time-domain signal in a first specific time period; receiving and storing at least one symbol period of the first echoed signal of the first time-domain transmit signal in the first specific time period; converting at least one symbol period of the first echoed signal into a first frequency-domain echoed signal after a first transmission period; and estimating the S11 parameters corresponding to carriers respectively according to the first transmit signal and the first echoed signal.

    摘要翻译: 本发明公开了一种用于半双工多载波通信系统的收发机的散射参数估计方法。 散射参数估计方法包括以下步骤:转换第一频域发射信号以产生第一时域发射信号的至少一个符号周期; 在第一特定时间段内发送所述第一时域信号; 在第一特定时间段内接收和存储第一时域发射信号的第一回波信号的至少一个符号周期; 在第一传输周期之后将第一回波信号的至少一个符号周期转换成第一频域回波信号; 以及分别根据第一发送信号和第一回波信号估计对应于载波的S11参数。

    Method and apparatus for interleaving an incoming stream of data blocks
    15.
    发明授权
    Method and apparatus for interleaving an incoming stream of data blocks 有权
    用于交织数据块的输入流的方法和装置

    公开(公告)号:US06651194B1

    公开(公告)日:2003-11-18

    申请号:US09638114

    申请日:2000-08-14

    IPC分类号: G06F1100

    CPC分类号: G06F7/76 H03M13/13

    摘要: An apparatus is adapted for interleaving an incoming stream of data blocks, each of which has a predetermined number (N) of block units indexed consecutively from 0 to (N−1), The interleaving is accomplished at a predetermined interleaving depth (D). A first one of the block units has no delay associated therewith, and subsequent ones of the block units in a designated one of the data blocks have a delay equal to (D−1) more than an immediately preceding one of the block units in the designated one of the data blocks. The apparatus includes a data buffer configured to have a number of lines equal to (N−1), an output unit, and a control unit. Each of the lines has a size sufficient to accommodate a predetermined number of the block units. The output unit outputs one of the block units of the incoming stream directly when the delay associated therewith is equal to zero. When the delay associated with one of the block units of the incoming stream is not equal to zero, the control unit generates a reading index for reading one of the block units stored in the data buffer, controls the output unit to output the block unit read from the data buffer, generates a writing index, and stores the block unit of the incoming stream in the respective one of the lines of the data buffer in accordance with the writing index. A method for interleaving the same is also disclosed.

    摘要翻译: 一种装置适于交织数据块的输入流,每个数据块具有从0到(N-1)连续索引的预定数量(N)个块单元。交织是以预定交织深度(D)完成的。 块单元中的第一个没有与之相关联的延迟,并且指定的一个数据块中的后续的块单元具有等于(D-1)的延迟等于(D-1)中的紧前一个块单元 指定一个数据块。 该装置包括配置为具有等于(N-1)的行数,输出单元和控制单元的数据缓冲器。 每条线具有足以容纳预定数量的块单元的尺寸。 当与其相关联的延迟等于零时,输​​出单元直接输出输入流的块单元中的一个。 当与进入流中的一个块单元相关联的延迟不等于零时,控制单元产生用于读取存储在数据缓冲器中的块单元之一的读取索引,控制输出单元输出块单元读数 从数据缓冲器生成写入索引,并且根据写入索引将输入流的块单元存储在数据缓冲器的相应行中。 还公开了一种交织方法。

    Efficient demodulation scheme for DSSS communication
    16.
    发明授权
    Efficient demodulation scheme for DSSS communication 失效
    DSSS通信的高效解调方案

    公开(公告)号:US5881098A

    公开(公告)日:1999-03-09

    申请号:US604473

    申请日:1996-02-21

    申请人: Ching-Kae Tzou

    发明人: Ching-Kae Tzou

    IPC分类号: H04B1/707

    CPC分类号: H04B1/707

    摘要: A DSSS receiver for processing a complex spread-spectrum signal which contains source information, the receiver including a despreading circuit which despreads a first complex signal that is derived from the spread-spectrum signal to produce a second complex signal; a differential demodulator which differentially demodulates the second complex signal to generate a third complex signal; and a sum and dump circuit which during each of successive symbol periods of the third complex signal sums multiple samples of the third complex signal to produce a fourth complex signal, wherein decision processing is performed in the fourth complex signal to extract the source information.

    摘要翻译: 一种用于处理包含源信息的复扩展频谱信号的DSSS接收机,所述接收机包括解扩电路,其解扩展从所述扩频信号导出的第一复信号以产生第二复信号; 差分解调器,差分解调第二复数信号以产生第三复数信号; 以及和和转储电路,其在所述第三复数信号的连续符号周期的每一个期间对所述第三复数信号的多个采样求和以产生第四复信号,其中在所述第四复信号中执行判定处理以提取所述源信息。