公开(公告)号：US08158469B2

公开(公告)日：2012-04-17

申请号：US12843738

申请日：2010-07-26

申请人： Hong-Koo Lee ,  Sung-Ki Kim ,  Jun-Hyeon Bae ,  Ki-Tae Kim

发明人： Hong-Koo Lee ,  Sung-Ki Kim ,  Jun-Hyeon Bae ,  Ki-Tae Kim

IPC分类号： H01L21/84

CPC分类号： H01L21/268 ,  H01L27/1248 ,  H01L27/1285

摘要： A method of fabricating an array substrate includes forming a gate line and a gate electrode; forming a gate insulating layer, an intrinsic amorphous silicon layer, an inorganic material insulating layer and a heat transfer layer on the gate line and the gate electrode; irradiating a laser beam onto the heat transfer layer to crystallize the intrinsic amorphous silicon layer into a polycrystalline silicon layer; removing the heat transfer layer; patterning the inorganic insulating material layer using a buffered oxide etchant to form an etch-stopper corresponding to the gate electrode forming an impurity-doped amorphous silicon layer and a metal layer on the etch-stopper and the polycrystalline silicon layer; patterning the metal layer to form a data line, a source electrode and a drain electrode and forming a pixel electrode on the passivation layer.

摘要翻译： 制造阵列基板的方法包括形成栅极线和栅电极; 在栅极线和栅电极上形成栅极绝缘层，本征非晶硅层，无机材料绝缘层和传热层; 将激光束照射到传热层上以将本征非晶硅层结晶成多晶硅层; 去除传热层; 使用缓冲的氧化物蚀刻剂来形成无机绝缘材料层，以形成对应于栅电极的蚀刻停止层，在蚀刻停止层和多晶硅层上形成杂质掺杂非晶硅层和金属层; 图案化金属层以形成数据线，源电极和漏电极，并在钝化层上形成像素电极。

公开(公告)号：US07859491B2

公开(公告)日：2010-12-28

申请号：US11798856

申请日：2007-05-17

申请人： Hong Koo Lee ,  Sang Hoon Jung

发明人： Hong Koo Lee ,  Sang Hoon Jung

IPC分类号： G09G3/30

CPC分类号： G09G3/3241 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0262

摘要： The pixel circuit of an organic light emitting display includes a first transistor to a seventh transistor, a first capacitor, a second transistor and an organic light emitting diode. The first capacitor stores the data signal from the first, second and third transistors, and the second capacitor stores the threshold voltage of the fourth transistor from the fifth transistor. Voltages stored in the first and second capacitors are combined by the sixth transistor, and the fourth transistor generates a driving current corresponding to a combined voltage of the voltages stored in the first and second capacitor. The seventh transistor transmits the driving current and the organic light emitting diode emits light corresponding to the driving current.

摘要翻译： 有机发光显示器的像素电路包括第一晶体管至第七晶体管，第一电容器，第二晶体管和有机发光二极管。 第一电容器存储来自第一，第二和第三晶体管的数据信号，第二电容器存储来自第五晶体管的第四晶体管的阈值电压。 存储在第一和第二电容器中的电压由第六晶体管组合，并且第四晶体管产生与存储在第一和第二电容器中的电压的组合电压相对应的驱动电流。 第七晶体管传输驱动电流，有机发光二极管发射与驱动电流相对应的光。

公开(公告)号：US20090321739A1

公开(公告)日：2009-12-31

申请号：US12314510

申请日：2008-12-11

申请人： Sung Ki Kim ,  Hong Koo Lee

发明人： Sung Ki Kim ,  Hong Koo Lee

IPC分类号： H01L21/20 ,  H01L33/00

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L29/04 ,  H01L29/78696

摘要： The present invention relates to an array substrate for a flat display device and a method for fabricating the same, in which a number of masks is reduced for reducing a cost and improving a device performance. The array substrate includes a gate electrode formed on an insulating substrate, a gate insulating film formed on an entire surface of the insulating substrate including the gate electrode, an active layer formed on the gate insulating film opposite to the gate electrode having a stack of a polysilicon layer and an amorphous silicon layer each having a width greater than the gate electrode, a source electrode and a drain electrode separated from each other at a portion of the active layer and formed over the active layer with an ohmic contact layer disposed therebetween, an interlayer insulating film formed on an entire surface of the insulating substrate having a contact hole to expose a predetermined portion of the drain electrode, and a pixel electrode connected to the drain electrode through the contact hole.

摘要翻译： 本发明涉及一种用于平板显示装置的阵列基板及其制造方法，其中减少了许多掩模以降低成本并提高器件性能。 阵列基板包括形成在绝缘基板上的栅极电极，形成在包括栅电极的绝缘基板的整个表面上的栅极绝缘膜，形成在与栅电极相对的栅极绝缘膜上的有源层， 多晶硅层和非晶硅层，其各自具有大于栅电极的宽度，源电极和漏电极在有源层的一部分彼此分离并且在有源层上形成有在其间设置的欧姆接触层， 层间绝缘膜，形成在具有接触孔的绝缘基板的整个表面上，以暴露出漏电极的预定部分，以及通过接触孔连接到漏电极的像素电极。

公开(公告)号：US07525125B2

公开(公告)日：2009-04-28

申请号：US11643968

申请日：2006-12-22

申请人： Tae Joon Ahn ,  Hong Koo Lee

发明人： Tae Joon Ahn ,  Hong Koo Lee

IPC分类号： H01L29/786

CPC分类号： H01L51/0545 ,  H01L27/3244 ,  H01L51/0558

摘要： A thin film transistor includes a semiconductor pattern on a substrate, a gate insulating film to cover the semiconductor pattern, a gate electrode partially overlapping the semiconductor pattern with the gate insulating film there between, a hole in the gate electrode to expose the gate insulating film, an interlayer insulating film to cover the gate electrode, and a source electrode and a drain electrode contacting the semiconductor pattern through the interlayer insulating layer and the gate insulating layer, wherein the semiconductor pattern includes at least two channels between the source electrode and the drain electrode, the at least two channels having a region with a varying width.

摘要翻译： 薄膜晶体管包括在基板上的半导体图形，覆盖半导体图案的栅极绝缘膜，与其间的栅极绝缘膜部分地与半导体图案重叠的栅电极，栅电极中的孔以露出栅极绝缘膜 ，覆盖栅电极的层间绝缘膜，以及通过层间绝缘层和栅极绝缘层与半导体图案接触的源电极和漏电极，其中，所述半导体图案在源电极和漏极之间包括至少两个沟道 所述至少两个通道具有具有变化宽度的区域。

公开(公告)号：US07402470B2

公开(公告)日：2008-07-22

申请号：US11155798

申请日：2005-06-17

申请人： Hong Koo Lee ,  Kwon Shik Park

发明人： Hong Koo Lee ,  Kwon Shik Park

IPC分类号： H01L21/84

CPC分类号： H01L29/4908 ,  G02F2001/136295 ,  H01L27/12 ,  H01L27/124 ,  H01L29/458

摘要： A thin film transistor array substrate and a fabricating method for simplifying a process and reducing a manufacturing cost. In the thin film transistor array substrate, a gate line is formed on a substrate and a gate insulating film is formed on the gate line. A data line is provided in such a manner to intersect the gate line with having the gate insulating film therebetween, and contains any at least one of tungsten silicide (WSix), cobalt silicide (CoSix) and nickel silicide (NiSix). A thin film transistor is provided at each intersection between the gate line and the data line. A pixel electrode is provided at a pixel area defined by each intersection between the gate line and the data line and is connected to the thin film transistor.

摘要翻译： 一种薄膜晶体管阵列基板和用于简化工艺并降低制造成本的制造方法。 在薄膜晶体管阵列基板中，在基板上形成栅极线，在栅极线上形成栅极绝缘膜。 以与栅极线相交的方式提供数据线，其间具有栅极绝缘膜，并且包含硅化钨（WSi x Si x Si x Si x Si x Si x Si x Si x Si x Si x Si x Si x Si x Si x Si x Si x x x x Ni）和硅化镍（NiSi x x）。 在栅极线和数据线之间的每个交叉点设置薄膜晶体管。 像素电极设置在由栅极线和数据线之间的每个交叉点限定的像素区域，并与薄膜晶体管连接。