Abstract:
A programmable logic device includes a plurality of logic blocks organized into a cluster. Each logic block may be configured into a logic mode and a memory mode. The logic blocks are arranged into at least one cluster, each cluster having a data bus configured to provide data words to logic blocks within its cluster.
Abstract:
A fast disassembling joint structure includes a base part and a removable part. One end of the removable part is secured to a desired structure; the other end is a connection arm. The housing has a raceway and a first semi-circular concavity. The movable clamp has an insertion section to engage a recess of the connection arm. The insertion section has a second semi-circular concavity to fit with the first semi-circular concavity so as to pivotally connect with the connection arm. A spring is adapted to provide a push force for the movable clamp. A top cover, secured on the housing, is employed to house the spring and movable clamp inside. A handle of the movable clamp extends out of an opening of the cover so that users can manually control the handle to disassemble the removable part.
Abstract:
A memory provides a programmable write port data width and an independently programmable read port data width. The independence between the programmable write port data width and the programmable read port data width is achieved without the use of a third clock domain.
Abstract:
A ring assembly for a pen has a bottom ring, a top ring, and a slender bridge connecting the bottom ring and the top ring. In assembly, a barrel of the pen extends through the bottom ring and the top ring, so that a sticker adhered around the barrel is securely attached to the barrel by clamping of the top ring and the bottom ring. Furthermore, a gap formed by two conjunct sides of the sticker is concealed by the bridge. By such arrangement, the ring assembly is able to be decorative and to avoid peeling of the sticker from the barrel after long-term use.
Abstract:
A dual-purpose pen has a barrel, a cap engaged with the barrel, and a ball point that is extendable from the end of the barrel, and a key-pressing point that is extendable from the end of the cap. The pen can be used for writing when the ball point is extended and for pressing keys when the key-pressing point is extended.
Abstract:
A wireless image transmission device includes an image processing main body; an image display unit electrically connected to the image processing main body; a first switching unit electrically connected to between the image processing main body and the image display unit; an image shooting control unit electrically connected to the first switching unit; and a wireless transmission unit electrically connected to the image shooting control unit. With these arrangements, images to be wirelessly transmitted from the wireless image device need not be converted in file type, so that the wireless image transmission device can have high transmission efficiency and simplified overall configuration to overcome the drawback of complicated configuration in the prior art wireless image transmission device.
Abstract:
In one embodiment, a method of converting an uncompressed bitstream into a compressed bitstream for a programmable logic device (PLD) is disclosed. The method includes embedding a first data frame from the uncompressed bitstream into the compressed bitstream, wherein the first data frame comprises a first data set; embedding a first instruction into the compressed bitstream to load the first data frame into a first row of configuration memory of the PLD at an address associated with the first data frame; identifying a second data frame in the uncompressed bitstream, wherein the second data frame comprises the first data set; and embedding a second instruction into the compressed bitstream to load the first data frame into a second row of the configuration memory at an address associated with the second data frame.
Abstract:
In one embodiment, a programmable logic device includes a plurality of configuration memory cells and at least one spare configuration memory cell adapted to store configuration data for a memory cell identified within the plurality of configuration memory cells (e.g., identified as a defective memory cell). An address shift register within the device is adapted to provide programming signals to the plurality of configuration memory cells via wordlines. A data shift register within the device is adapted to provide configuration data to the plurality of configuration memory cells via bitlines. The data shift register is further adapted to provide configuration data from the spare configuration memory cell to the identified configuration memory cell.
Abstract:
Systems and methods are disclosed directed to techniques with respect to defective configuration memory cells. For example, in accordance with an embodiment of the present invention, a programmable logic device includes a plurality of configuration memory cells; and at least one spare memory cell, wherein the at least one spare memory cell is adapted to store configuration data to provide to at least one defective configuration memory cell.
Abstract:
Systems and methods are disclosed herein to provide high fan-out signal routing. For example, in accordance with an embodiment of the present invention, a programmable logic device includes a plurality of logic blocks; an interconnect structure adapted to route signals among the logic blocks; and a secondary routing network adapted to route signals among the logic blocks. The secondary routing network may include a plurality of horizontal splines adapted to route signals within the programmable logic device; a plurality of vertical spline taps adapted to route signals within the programmable logic device; a plurality of common interface blocks adapted to route signals between the horizontal splines and the vertical spline taps; and a plurality of horizontal secondary branches adapted to route signals from the vertical spline taps to the logic blocks.